Module Name: src
Committed By: jmcneill
Date: Mon Sep 18 16:58:04 UTC 2017
Modified Files:
src/sys/arch/arm/fdt: cpu_fdt.c
Log Message:
Add support for arm,arm1176jzf-s
To generate a diff of this commit:
cvs rdiff -u -r1.2 -r1.3 src/sys/arch/arm/fdt/cpu_fdt.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/fdt/cpu_fdt.c
diff -u src/sys/arch/arm/fdt/cpu_fdt.c:1.2 src/sys/arch/arm/fdt/cpu_fdt.c:1.3
--- src/sys/arch/arm/fdt/cpu_fdt.c:1.2 Sun Jun 18 23:20:20 2017
+++ src/sys/arch/arm/fdt/cpu_fdt.c Mon Sep 18 16:58:04 2017
@@ -1,4 +1,4 @@
-/* $NetBSD: cpu_fdt.c,v 1.2 2017/06/18 23:20:20 jmcneill Exp $ */
+/* $NetBSD: cpu_fdt.c,v 1.3 2017/09/18 16:58:04 jmcneill Exp $ */
/*-
* Copyright (c) 2017 Jared McNeill <[email protected]>
@@ -27,7 +27,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: cpu_fdt.c,v 1.2 2017/06/18 23:20:20 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: cpu_fdt.c,v 1.3 2017/09/18 16:58:04 jmcneill Exp $");
#include <sys/param.h>
#include <sys/bus.h>
@@ -42,47 +42,67 @@ __KERNEL_RCSID(0, "$NetBSD: cpu_fdt.c,v
static int cpu_fdt_match(device_t, cfdata_t, void *);
static void cpu_fdt_attach(device_t, device_t, void *);
+enum cpu_fdt_type {
+ ARM_CPU_UP = 1,
+ ARM_CPU_ARMV7,
+ ARM_CPU_ARMV8,
+};
+
struct cpu_fdt_softc {
device_t sc_dev;
int sc_phandle;
};
+static const struct of_compat_data compat_data[] = {
+ { "arm,arm1176jzf-s", ARM_CPU_UP },
+
+ { "arm,cortex-a5", ARM_CPU_ARMV7 },
+ { "arm,cortex-a7", ARM_CPU_ARMV7 },
+ { "arm,cortex-a8", ARM_CPU_ARMV7 },
+ { "arm,cortex-a9", ARM_CPU_ARMV7 },
+ { "arm,cortex-a12", ARM_CPU_ARMV7 },
+ { "arm,cortex-a15", ARM_CPU_ARMV7 },
+ { "arm,cortex-a17", ARM_CPU_ARMV7 },
+
+ { "arm,cortex-a53", ARM_CPU_ARMV8 },
+ { "arm,cortex-a57", ARM_CPU_ARMV8 },
+ { "arm,cortex-a72", ARM_CPU_ARMV8 },
+ { "arm,cortex-a73", ARM_CPU_ARMV8 },
+ { NULL }
+};
+
CFATTACH_DECL_NEW(cpu_fdt, sizeof(struct cpu_fdt_softc),
cpu_fdt_match, cpu_fdt_attach, NULL, NULL);
static int
cpu_fdt_match(device_t parent, cfdata_t cf, void *aux)
{
- const char * const compatible[] = {
- "arm,cortex-a5",
- "arm,cortex-a7",
- "arm,cortex-a8",
- "arm,cortex-a9",
- "arm,cortex-a12",
- "arm,cortex-a15",
- "arm,cortex-a17",
- "arm,cortex-a53",
- "arm,cortex-a57",
- "arm,cortex-a72",
- "arm,cortex-a73",
- NULL
- };
struct fdt_attach_args * const faa = aux;
+ const int phandle = faa->faa_phandle;
+ enum cpu_fdt_type type;
int is_compatible;
bus_addr_t mpidr;
- is_compatible = of_match_compatible(faa->faa_phandle, compatible);
+ is_compatible = of_match_compat_data(phandle, compat_data);
if (!is_compatible)
return 0;
- /* XXX NetBSD requires all CPUs to be in the same cluster */
- if (fdtbus_get_reg(faa->faa_phandle, 0, &mpidr, NULL) != 0)
- return 0;
- const uint32_t bp_mpidr = armreg_mpidr_read();
- const u_int bp_clid = __SHIFTOUT(bp_mpidr, CORTEXA9_MPIDR_CLID);
- const u_int clid = __SHIFTOUT(mpidr, CORTEXA9_MPIDR_CLID);
- if (bp_clid != clid)
- return 0;
+ type = of_search_compatible(phandle, compat_data)->data;
+ switch (type) {
+ case ARM_CPU_ARMV7:
+ case ARM_CPU_ARMV8:
+ /* XXX NetBSD requires all CPUs to be in the same cluster */
+ if (fdtbus_get_reg(phandle, 0, &mpidr, NULL) != 0)
+ return 0;
+ const uint32_t bp_mpidr = armreg_mpidr_read();
+ const u_int bp_clid = __SHIFTOUT(bp_mpidr, CORTEXA9_MPIDR_CLID);
+ const u_int clid = __SHIFTOUT(mpidr, CORTEXA9_MPIDR_CLID);
+ if (bp_clid != clid)
+ return 0;
+ break;
+ default:
+ break;
+ }
return is_compatible;
}
@@ -92,16 +112,30 @@ cpu_fdt_attach(device_t parent, device_t
{
struct cpu_fdt_softc * const sc = device_private(self);
struct fdt_attach_args * const faa = aux;
+ const int phandle = faa->faa_phandle;
+ enum cpu_fdt_type type;
bus_addr_t mpidr;
+ cpuid_t cpuid;
sc->sc_dev = self;
- sc->sc_phandle = faa->faa_phandle;
+ sc->sc_phandle = phandle;
+
+ type = of_search_compatible(phandle, compat_data)->data;
- if (fdtbus_get_reg(sc->sc_phandle, 0, &mpidr, NULL) != 0) {
- aprint_error(": missing 'reg' property\n");
- return;
+ switch (type) {
+ case ARM_CPU_ARMV7:
+ case ARM_CPU_ARMV8:
+ if (fdtbus_get_reg(phandle, 0, &mpidr, NULL) != 0) {
+ aprint_error(": missing 'reg' property\n");
+ return;
+ }
+ cpuid = __SHIFTOUT(mpidr, CORTEXA9_MPIDR_CPUID);
+ break;
+ default:
+ cpuid = 0;
+ break;
}
/* Attach the CPU */
- cpu_attach(self, __SHIFTOUT(mpidr, CORTEXA9_MPIDR_CPUID));
+ cpu_attach(self, cpuid);
}
