Module Name:    src
Committed By:   jmcneill
Date:           Mon Oct  2 22:51:15 UTC 2017

Modified Files:
        src/sys/arch/arm/dts: sun8i-h3-orangepi-plus2e.dts sun8i-h3.dtsi

Log Message:
Add operating points for OrangePi Plus2E and enable cpufreq scaling.


To generate a diff of this commit:
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/arm/dts/sun8i-h3-orangepi-plus2e.dts
cvs rdiff -u -r1.2 -r1.3 src/sys/arch/arm/dts/sun8i-h3.dtsi

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/dts/sun8i-h3-orangepi-plus2e.dts
diff -u src/sys/arch/arm/dts/sun8i-h3-orangepi-plus2e.dts:1.1 src/sys/arch/arm/dts/sun8i-h3-orangepi-plus2e.dts:1.2
--- src/sys/arch/arm/dts/sun8i-h3-orangepi-plus2e.dts:1.1	Thu Jul 13 01:17:58 2017
+++ src/sys/arch/arm/dts/sun8i-h3-orangepi-plus2e.dts	Mon Oct  2 22:51:15 2017
@@ -1,4 +1,4 @@
-/* $NetBSD: sun8i-h3-orangepi-plus2e.dts,v 1.1 2017/07/13 01:17:58 jmcneill Exp $ */
+/* $NetBSD: sun8i-h3-orangepi-plus2e.dts,v 1.2 2017/10/02 22:51:15 jmcneill Exp $ */
 
 /*-
  * Copyright (c) 2017 Jared McNeill <jmcne...@invisible.ca>
@@ -41,6 +41,20 @@
 		enable-active-high;
 		gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>;
 	};
+
+	cpus {
+		cpu@0 {
+			cpu-supply = <&vdd_cpu>;
+			operating-points = <
+				/* kHz	  uV */
+				1296000	1340000
+				1200000	1320000
+				1008000	1200000
+				816000	1100000
+				648000	1040000
+				>;
+		};
+	};
 };
 
 &emac {
@@ -57,3 +71,19 @@
 		reg = <1>;
 	};
 };
+
+&r_i2c {
+	status = "okay";
+
+	vdd_cpu: regulator@65 {
+		compatible = "silergy,sy8106a";
+		reg = <0x65>;
+
+		regulator-name = "vdd-cpu";
+		regulator-min-microvolt = <1000000>;
+		regulator-max-microvolt = <1400000>;
+		regulator-ramp-delay = <200>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+};

Index: src/sys/arch/arm/dts/sun8i-h3.dtsi
diff -u src/sys/arch/arm/dts/sun8i-h3.dtsi:1.2 src/sys/arch/arm/dts/sun8i-h3.dtsi:1.3
--- src/sys/arch/arm/dts/sun8i-h3.dtsi:1.2	Sat Sep  2 17:35:07 2017
+++ src/sys/arch/arm/dts/sun8i-h3.dtsi	Mon Oct  2 22:51:15 2017
@@ -1,4 +1,4 @@
-/* $NetBSD: sun8i-h3.dtsi,v 1.2 2017/09/02 17:35:07 jmcneill Exp $ */
+/* $NetBSD: sun8i-h3.dtsi,v 1.3 2017/10/02 22:51:15 jmcneill Exp $ */
 
 /*-
  * Copyright (c) 2017 Jared McNeill <jmcne...@invisible.ca>
@@ -40,6 +40,13 @@
 		};
 	};
 
+	cpus {
+		cpu@0 {
+			clocks = <&ccu CLK_CPUX>;
+			clock-latency = <2000000>;
+		};
+	};
+
 	soc {
 		emac: ethernet@1c30000 {
 			compatible = "allwinner,sun8i-h3-emac";
@@ -54,6 +61,15 @@
 			#size-cells = <0>;
 			status = "disabled";
 		};
+
+		r_i2c: i2c@1f02400 {
+			compatible = "allwinner,sun6i-a31-i2c";
+			reg = <0x01f02400 0x400>;
+			interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
+			status = "disabled";
+			#address-cells = <1>;
+			#size-cells = <0>;
+		};
 	};
 };
 

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