Module Name: src
Committed By: hkenken
Date: Thu Nov 9 05:57:23 UTC 2017
Modified Files:
src/sys/arch/arm/imx: files.imx6 imx6_ahcisata.c imx6_axi.c
imx6_board.c imx6_ccm.c imx6_ccmreg.h imx6_ccmvar.h imx6_pcie.c
imx6_reg.h
src/sys/arch/evbarm/conf: CUBOX-I HUMMINGBOARD IMX6UL-STARTER
NITROGEN6X
src/sys/arch/evbarm/nitrogen6: nitrogen6_usb.c
Added Files:
src/sys/arch/arm/imx: imx6_usbphy.c imx6_usbphyreg.h
Log Message:
- Add imxusbphy driver for i.MX6.
- Clean up CCM (Clock driver).
Add imx6_ccm_analog_read/write() functions.
To generate a diff of this commit:
cvs rdiff -u -r1.11 -r1.12 src/sys/arch/arm/imx/files.imx6
cvs rdiff -u -r1.5 -r1.6 src/sys/arch/arm/imx/imx6_ahcisata.c \
src/sys/arch/arm/imx/imx6_ccmreg.h
cvs rdiff -u -r1.3 -r1.4 src/sys/arch/arm/imx/imx6_axi.c
cvs rdiff -u -r1.8 -r1.9 src/sys/arch/arm/imx/imx6_board.c
cvs rdiff -u -r1.6 -r1.7 src/sys/arch/arm/imx/imx6_ccm.c \
src/sys/arch/arm/imx/imx6_reg.h
cvs rdiff -u -r1.4 -r1.5 src/sys/arch/arm/imx/imx6_ccmvar.h \
src/sys/arch/arm/imx/imx6_pcie.c
cvs rdiff -u -r0 -r1.1 src/sys/arch/arm/imx/imx6_usbphy.c \
src/sys/arch/arm/imx/imx6_usbphyreg.h
cvs rdiff -u -r1.11 -r1.12 src/sys/arch/evbarm/conf/CUBOX-I
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/evbarm/conf/HUMMINGBOARD
cvs rdiff -u -r1.4 -r1.5 src/sys/arch/evbarm/conf/IMX6UL-STARTER
cvs rdiff -u -r1.13 -r1.14 src/sys/arch/evbarm/conf/NITROGEN6X
cvs rdiff -u -r1.2 -r1.3 src/sys/arch/evbarm/nitrogen6/nitrogen6_usb.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/imx/files.imx6
diff -u src/sys/arch/arm/imx/files.imx6:1.11 src/sys/arch/arm/imx/files.imx6:1.12
--- src/sys/arch/arm/imx/files.imx6:1.11 Fri Sep 8 05:29:12 2017
+++ src/sys/arch/arm/imx/files.imx6 Thu Nov 9 05:57:23 2017
@@ -1,4 +1,4 @@
-# $NetBSD: files.imx6,v 1.11 2017/09/08 05:29:12 hkenken Exp $
+# $NetBSD: files.imx6,v 1.12 2017/11/09 05:57:23 hkenken Exp $
#
# Configuration info for the Freescale i.MX6
#
@@ -90,6 +90,11 @@ file arch/arm/imx/if_enet_imx6.c enet
device imxusbc { unit, irq } : bus_dma_generic
file arch/arm/imx/imx6_usb.c imxusbc
+# USB Phy
+device imxusbphy
+attach imxusbphy at axi
+file arch/arm/imx/imx6_usbphy.c imxusbphy
+
attach ehci at imxusbc with imxehci
file arch/arm/imx/imxusb.c imxehci
Index: src/sys/arch/arm/imx/imx6_ahcisata.c
diff -u src/sys/arch/arm/imx/imx6_ahcisata.c:1.5 src/sys/arch/arm/imx/imx6_ahcisata.c:1.6
--- src/sys/arch/arm/imx/imx6_ahcisata.c:1.5 Fri Jun 9 18:14:59 2017
+++ src/sys/arch/arm/imx/imx6_ahcisata.c Thu Nov 9 05:57:23 2017
@@ -1,4 +1,4 @@
-/* $NetBSD: imx6_ahcisata.c,v 1.5 2017/06/09 18:14:59 ryo Exp $ */
+/* $NetBSD: imx6_ahcisata.c,v 1.6 2017/11/09 05:57:23 hkenken Exp $ */
/*
* Copyright (c) 2014 Ryo Shimizu <r...@nerv.org>
@@ -27,7 +27,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: imx6_ahcisata.c,v 1.5 2017/06/09 18:14:59 ryo Exp $");
+__KERNEL_RCSID(0, "$NetBSD: imx6_ahcisata.c,v 1.6 2017/11/09 05:57:23 hkenken Exp $");
#include "locators.h"
#include "opt_imx.h"
@@ -273,9 +273,9 @@ ixm6_ahcisata_init(struct imx_ahci_softc
"couldn't enable CCM_ANALOG_PLL_ENET\n");
return -1;
}
- v = imx6_ccm_read(CCM_ANALOG_PLL_ENET);
+ v = imx6_ccm_analog_read(CCM_ANALOG_PLL_ENET);
v |= CCM_ANALOG_PLL_ENET_ENABLE_100M;
- imx6_ccm_write(CCM_ANALOG_PLL_ENET, v);
+ imx6_ccm_analog_write(CCM_ANALOG_PLL_ENET, v);
v = iomux_read(IOMUX_GPR13);
/* clear */
Index: src/sys/arch/arm/imx/imx6_ccmreg.h
diff -u src/sys/arch/arm/imx/imx6_ccmreg.h:1.5 src/sys/arch/arm/imx/imx6_ccmreg.h:1.6
--- src/sys/arch/arm/imx/imx6_ccmreg.h:1.5 Fri Jun 9 18:14:59 2017
+++ src/sys/arch/arm/imx/imx6_ccmreg.h Thu Nov 9 05:57:23 2017
@@ -1,4 +1,4 @@
-/* $NetBSD: imx6_ccmreg.h,v 1.5 2017/06/09 18:14:59 ryo Exp $ */
+/* $NetBSD: imx6_ccmreg.h,v 1.6 2017/11/09 05:57:23 hkenken Exp $ */
/*
* Copyright (c) 2014 Ryo Shimizu <r...@nerv.org>
@@ -45,14 +45,29 @@
#define IMX6_OSC_FREQ (24 * 1000 * 1000) /* 24MHz */
#endif
-#define IMX6_CCM_SIZE 0x8000
- /* 0x00000000 = 0x020c4000 */
#define CCM_CCR 0x00000000
+#define CCM_CCR_RBC_EN __BIT(27)
+#define CCM_CCR_REG_BYPASS_COUNT __BITS(26, 21)
+#define CCM_CCR_WB_COUNT __BITS(18, 16)
+#define CCM_CCR_COSC_EN __BIT(12)
+#define CCM_CCR_OSCNT __BITS(7, 0)
+
#define CCM_CCDR 0x00000004
#define CCM_CSR 0x00000008
#define CCM_CCSR 0x0000000c
+#define CCM_CCSR_PLL3_PFD1_DIS_MASK __BIT(15)
+#define CCM_CCSR_PLL3_PFD0_DIS_MASK __BIT(14)
+#define CCM_CCSR_PLL3_PFD3_DIS_MASK __BIT(13)
+#define CCM_CCSR_PLL3_PFD2_DIS_MASK __BIT(12)
+#define CCM_CCSR_PLL2_PFD1_594M_DIS_MASK __BIT(11)
+#define CCM_CCSR_PLL2_PFD0_DIS_MASK __BIT(10)
+#define CCM_CCSR_PLL2_PFD2_DIS_MASK __BIT(9)
+#define CCM_CCSR_STEP_SEL __BIT(8)
+#define CCM_CCSR_PLL1_SW_CLK_SEL __BIT(2)
+#define CCM_CCSR_PLL3_SW_CLK_SEL __BIT(0)
#define CCM_CACRR 0x00000010
#define CCM_CACRR_ARM_PODF __BITS(2, 0)
+
#define CCM_CBCDR 0x00000014
#define CCM_CBCDR_PERIPH_CLK2_PODF __BITS(29, 27)
/* source of mmdc_ch1_axi_clk_root */
@@ -64,7 +79,7 @@
#define CCM_CBCDR_AHB_PODF __BITS(12, 10)
#define CCM_CBCDR_IPG_PODF __BITS(9, 8)
#define CCM_CBCDR_AXI_ALT_SEL __BIT(7)
-#define CCM_CBCDR_AXI_SEL __BIT(6)
+#define CCM_CBCDR_AXI_SEL __BITS(7, 6)
#define CCM_CBCDR_MMDC_CH1_AXI_PODF __BITS(5, 3)
#define CCM_CBCDR_PERIPH2_CLK2_PODF __BITS(2, 0)
@@ -105,16 +120,22 @@
#define CCM_CSCMR2_LDB_DI0_IPU_DIV __BIT(10)
#define CCM_CSCMR2_CAN_CLK_PODF __BITS(7, 2)
-
#define CCM_CSCDR1 0x00000024
-#define CCM_CSCDR1_VPU_AXI_PODF __BITS(25, 27)
-#define CCM_CSCDR1_USDHC4_PODF __BITS(22, 24)
-#define CCM_CSCDR1_USDHC3_PODF __BITS(19, 21)
-#define CCM_CSCDR1_USDHC2_PODF __BITS(16, 18)
+#define CCM_CSCDR1_VPU_AXI_PODF __BITS(27, 25)
+#define CCM_CSCDR1_USDHC4_PODF __BITS(24, 22)
+#define CCM_CSCDR1_USDHC3_PODF __BITS(21, 19)
+#define CCM_CSCDR1_USDHC2_PODF __BITS(18, 16)
#define CCM_CSCDR1_USDHC1_PODF __BITS(13, 11)
#define CCM_CSCDR1_UART_CLK_PODF __BITS(5, 0)
#define CCM_CS1CDR 0x00000028
+#define CCM_CS1CDR_ESAI_CLK_PODF __BITS(27, 25)
+#define CCM_CS1CDR_SSI3_CLK_PRED __BITS(24, 22)
+#define CCM_CS1CDR_SSI3_CLK_PODF __BITS(21, 16)
+#define CCM_CS1CDR_ESAI_CLK_PRED __BITS(11, 9)
+#define CCM_CS1CDR_SSI1_CLK_PRED __BITS(8, 6)
+#define CCM_CS1CDR_SSI1_CLK_PODF __BITS(5, 0)
+
#define CCM_CS2CDR 0x0000002c
#define CCM_CS2CDR_ENFC_CLK_PODF __BITS(26, 21)
#define CCM_CS2CDR_ENFC_CLK_PRED __BITS(20, 18)
@@ -123,7 +144,17 @@
#define CCM_CS2CDR_LDB_DI0_CLK_SEL __BITS(11, 9)
#define CCM_CS2CDR_SSI2_CLK_PRED __BITS(8, 6)
#define CCM_CS2CDR_SSI2_CLK_PODF __BITS(5, 0)
+
#define CCM_CDCDR 0x00000030
+#define CCM_CDCDR_HSI_TX_PODF __BITS(31, 29)
+#define CCM_CDCDR_HSI_TX_CLK_SEL __BIT(28)
+#define CCM_CDCDR_SPDIF0_CLK_PRED __BITS(27, 25)
+#define CCM_CDCDR_SPDIF0_CLK_PODF __BITS(24, 22)
+#define CCM_CDCDR_SPDIF0_CLK_SEL __BITS(21, 20)
+#define CCM_CDCDR_SPDIF1_CLK_PRED __BITS(14, 12)
+#define CCM_CDCDR_SPDIF1_CLK_PODF __BITS(11, 9)
+#define CCM_CDCDR_SPDIF1_CLK_SEL __BITS(8, 7)
+
#define CCM_CHSCCDR 0x00000034
#define CCM_CHSCCDR_IPU1_DI1_PRE_CLK_SEL __BITS(17, 15)
#define CCM_CHSCCDR_IPU1_DI1_PODF __BITS(14, 12)
@@ -134,12 +165,38 @@
#define CCM_CSCDR2 0x00000038
+#define CCM_CSCDR2_ECSPI_CLK_PODF __BITS(24, 19)
+#define CCM_CSCDR2_IPU2_DI1_PRE_CLK_SEL __BITS(17, 15)
+#define CCM_CSCDR2_IPU2_DI1_PODF __BITS(14, 12)
+#define CCM_CSCDR2_IPU2_DI1_CLK_SEL __BITS(11, 9)
+#define CCM_CSCDR2_IPU2_DI0_PRE_CLK_SEL __BITS(8, 6)
+#define CCM_CSCDR2_IPU2_DI0_PODF __BITS(5, 3)
+#define CCM_CSCDR2_IPU2_DI0_CLK_SEL __BITS(2, 0)
+
+#define CCM_CDHIPR 0x00000048
+#define CCM_CDHIPR_ARM_PODF_BUSY __BIT(16)
+#define CCM_CDHIPR_PERIPH_CLK_SEL_BUSY __BIT(5)
+#define CCM_CDHIPR_MMDC_CH0_PODF_BUSY __BIT(4)
+#define CCM_CDHIPR_PERIPH2_CLK_SEL_BUSY __BIT(3)
+#define CCM_CDHIPR_MMDC_CH1_PODF_BUSY __BIT(2)
+#define CCM_CDHIPR_AHB_PODF_BUSY __BIT(1)
+#define CCM_CDHIPR_AXI_PODF_BUSY __BIT(0)
+
#define CCM_CSCDR3 0x0000003c
#define CCM_CSCDR3_IPU2_HSP_PODF __BITS(18, 16)
#define CCM_CSCDR3_IPU2_HSP_CLK_SEL __BITS(15, 14)
#define CCM_CSCDR3_IPU1_HSP_PODF __BITS(13, 11)
#define CCM_CSCDR3_IPU1_HSP_CLK_SEL __BITS(10, 9)
+#define CCM_CCOSR 0x00000060
+#define CCM_CCOSR_CLKO2_EN __BIT(24)
+#define CCM_CCOSR_CLKO2_DIV __BITS(23, 21)
+#define CCM_CCOSR_CLKO2_SEL __BITS(20, 16)
+#define CCM_CCOSR_CLK_OUT_SEL __BIT(8)
+#define CCM_CCOSR_CLKO1_EN __BIT(7)
+#define CCM_CCOSR_CLKO1_DIV __BITS(6, 4)
+#define CCM_CCOSR_CLKO1_SEL __BITS(3, 0)
+
#define CCM_CCGR2 0x00000070
#define CCM_CCGR2_IPSYNC_VDOA_IPG_CLK_ENABLE(n) __SHIFTIN(n, __BITS(27, 26))
#define CCM_CCGR2_IPSYNC_IP2APB_TZASC2_IPG_CLK_ENABLE(n) __SHIFTIN(n, __BITS(25, 24))
@@ -192,60 +249,92 @@
#define CCM_CCGR6_USDHC1_CLK_ENABLE(n) __SHIFTIN(n, __BITS(3, 2))
#define CCM_CCGR6_USBOH3_CLK_ENABLE(n) __SHIFTIN(n, __BITS(1, 0))
- /* 0x00004000 = 0x020c8000 */
-#define CCM_ANALOG_PLL_ARM 0x00004000 /* = 020c8000 */
-#define CCM_ANALOG_PLL_ARM_SET 0x00004004
-#define CCM_ANALOG_PLL_ARM_CLR 0x00004008
-#define CCM_ANALOG_PLL_ARM_TOG 0x0000400c
+#define CCM_ANALOG_PLL_ARM 0x00000000 /* = 020c8000 */
+#define CCM_ANALOG_PLL_ARM_LOCK __BIT(31)
+#define CCM_ANALOG_PLL_ARM_PLL_SEL __BIT(19)
+#define CCM_ANALOG_PLL_ARM_LVDS_24MHZ_SEL __BIT(18)
+#define CCM_ANALOG_PLL_ARM_LVDS_SEL __BIT(17)
+#define CCM_ANALOG_PLL_ARM_BYPASS __BIT(16)
+#define CCM_ANALOG_PLL_ARM_BYPASS_CLK_SRC __BITS(15, 14)
+#define CCM_ANALOG_PLL_ARM_ENABLE __BIT(13)
+#define CCM_ANALOG_PLL_ARM_POWERDOWN __BIT(12)
#define CCM_ANALOG_PLL_ARM_DIV_SELECT __BITS(6, 0)
-#define CCM_ANALOG_PLL_USB1 0x00004010
-#define CCM_ANALOG_PLL_USB1_SET 0x00004014
-#define CCM_ANALOG_PLL_USB1_CLR 0x00004018
-#define CCM_ANALOG_PLL_USB1_TOG 0x0000401c
+
+#define CCM_ANALOG_PLL_ARM_SET 0x00000004
+#define CCM_ANALOG_PLL_ARM_CLR 0x00000008
+#define CCM_ANALOG_PLL_ARM_TOG 0x0000000c
+#define CCM_ANALOG_PLL_ARM_DIV_SELECT __BITS(6, 0)
+
+#define CCM_ANALOG_PLL_USB1 0x00000010
+#define CCM_ANALOG_PLL_USB1_SET 0x00000014
+#define CCM_ANALOG_PLL_USB1_CLR 0x00000018
+#define CCM_ANALOG_PLL_USB1_TOG 0x0000001c
+#define CCM_ANALOG_PLL_USB1_LOCK __BIT(31)
+#define CCM_ANALOG_PLL_USB1_BYPASS __BIT(16)
+#define CCM_ANALOG_PLL_USB1_BYPASS_CLK_SRC __BITS(15, 14)
+#define CCM_ANALOG_PLL_USB1_ENABLE __BIT(13)
+#define CCM_ANALOG_PLL_USB1_POWER __BIT(12)
+#define CCM_ANALOG_PLL_USB1_EN_USB_CLK __BIT(6)
#define CCM_ANALOG_PLL_USB1_DIV_SELECT __BITS(1, 0)
-#define CCM_ANALOG_PLL_USB2 0x00004020
-#define CCM_ANALOG_PLL_USB2_SET 0x00004024
-#define CCM_ANALOG_PLL_USB2_CLR 0x00004028
-#define CCM_ANALOG_PLL_USB2_TOG 0x0000402c
+
+#define CCM_ANALOG_PLL_USB2 0x00000020
+#define CCM_ANALOG_PLL_USB2_SET 0x00000024
+#define CCM_ANALOG_PLL_USB2_CLR 0x00000028
+#define CCM_ANALOG_PLL_USB2_TOG 0x0000002c
+#define CCM_ANALOG_PLL_USB2_LOCK __BIT(31)
+#define CCM_ANALOG_PLL_USB2_BYPASS __BIT(16)
+#define CCM_ANALOG_PLL_USB2_BYPASS_CLK_SRC __BITS(15, 14)
+#define CCM_ANALOG_PLL_USB2_ENABLE __BIT(13)
+#define CCM_ANALOG_PLL_USB2_POWER __BIT(12)
+#define CCM_ANALOG_PLL_USB2_EN_USB_CLK __BIT(6)
+#define CCM_ANALOG_PLL_USB2_DIV_SELECT __BITS(1, 0)
+
#define CCM_ANALOG_PLL_USBn_LOCK __BIT(31)
#define CCM_ANALOG_PLL_USBn_BYPASS __BIT(16)
+#define CCM_ANALOG_PLL_USBn_BYPASS_CLK_SRC __BITS(15, 14)
#define CCM_ANALOG_PLL_USBn_ENABLE __BIT(13)
#define CCM_ANALOG_PLL_USBn_POWER __BIT(12)
#define CCM_ANALOG_PLL_USBn_EN_USB_CLK __BIT(6)
-#define CCM_ANALOG_PLL_USBn_DIV_SELECT(n) __BITS(1, 0)
-#define CCM_ANALOG_PLL_SYS 0x00004030
-#define CCM_ANALOG_PLL_SYS_SET 0x00004034
-#define CCM_ANALOG_PLL_SYS_CLR 0x00004038
-#define CCM_ANALOG_PLL_SYS_TOG 0x0000403c
+#define CCM_ANALOG_PLL_USBn_DIV_SELECT __BITS(1, 0)
+
+#define CCM_ANALOG_PLL_SYS 0x00000030
+#define CCM_ANALOG_PLL_SYS_SET 0x00000034
+#define CCM_ANALOG_PLL_SYS_CLR 0x00000038
+#define CCM_ANALOG_PLL_SYS_TOG 0x0000003c
+#define CCM_ANALOG_PLL_SYS_BYPASS_CLK_SRC __BITS(15, 14)
#define CCM_ANALOG_PLL_SYS_ENABLE __BIT(13)
#define CCM_ANALOG_PLL_SYS_DIV_SELECT __BIT(0)
-#define CCM_ANALOG_PLL_SYS_SS 0x00004040
-#define CCM_ANALOG_PLL_SYS_NUM 0x00004050
-#define CCM_ANALOG_PLL_SYS_DENOM 0x00004060
-#define CCM_ANALOG_PLL_AUDIO 0x00004070
-#define CCM_ANALOG_PLL_AUDIO_SET 0x00004074
-#define CCM_ANALOG_PLL_AUDIO_CLR 0x00004078
-#define CCM_ANALOG_PLL_AUDIO_TOG 0x0000407c
+#define CCM_ANALOG_PLL_SYS_SS 0x00000040
+#define CCM_ANALOG_PLL_SYS_NUM 0x00000050
+#define CCM_ANALOG_PLL_SYS_DENOM 0x00000060
+#define CCM_ANALOG_PLL_AUDIO 0x00000070
+#define CCM_ANALOG_PLL_AUDIO_SET 0x00000074
+#define CCM_ANALOG_PLL_AUDIO_CLR 0x00000078
+#define CCM_ANALOG_PLL_AUDIO_TOG 0x0000007c
#define CCM_ANALOG_PLL_AUDIO_POST_DIV_SELECT __BITS(20, 19)
+#define CCM_ANALOG_PLL_AUDIO_BYPASS_CLK_SRC __BITS(15, 14)
+#define CCM_ANALOG_PLL_AUDIO_ENABLE __BIT(13)
#define CCM_ANALOG_PLL_AUDIO_DIV_SELECT __BITS(6, 0)
-#define CCM_ANALOG_PLL_AUDIO_NUM 0x00004080
-#define CCM_ANALOG_PLL_AUDIO_DENOM 0x00004090
-#define CCM_ANALOG_PLL_VIDEO 0x000040a0
+#define CCM_ANALOG_PLL_AUDIO_NUM 0x00000080
+#define CCM_ANALOG_PLL_AUDIO_DENOM 0x00000090
+#define CCM_ANALOG_PLL_VIDEO 0x000000a0
#define CCM_ANALOG_PLL_VIDEO_POST_DIV_SELECT __BITS(20, 19)
+#define CCM_ANALOG_PLL_VIDEO_BYPASS_CLK_SRC __BITS(15, 14)
+#define CCM_ANALOG_PLL_VIDEO_ENABLE __BIT(13)
#define CCM_ANALOG_PLL_VIDEO_DIV_SELECT __BITS(6, 0)
-#define CCM_ANALOG_PLL_VIDEO_SET 0x000040a4
-#define CCM_ANALOG_PLL_VIDEO_CLR 0x000040a8
-#define CCM_ANALOG_PLL_VIDEO_TOG 0x000040ac
-#define CCM_ANALOG_PLL_VIDEO_NUM 0x000040b0
-#define CCM_ANALOG_PLL_VIDEO_DENOM 0x000040c0
-#define CCM_ANALOG_PLL_MLB 0x000040d0
-#define CCM_ANALOG_PLL_MLB_SET 0x000040d4
-#define CCM_ANALOG_PLL_MLB_CLR 0x000040d8
-#define CCM_ANALOG_PLL_MLB_TOG 0x000040dc
-#define CCM_ANALOG_PLL_ENET 0x000040e0
-#define CCM_ANALOG_PLL_ENET_SET 0x000040e4
-#define CCM_ANALOG_PLL_ENET_CLR 0x000040e8
-#define CCM_ANALOG_PLL_ENET_TOG 0x000040ec
+#define CCM_ANALOG_PLL_VIDEO_SET 0x000000a4
+#define CCM_ANALOG_PLL_VIDEO_CLR 0x000000a8
+#define CCM_ANALOG_PLL_VIDEO_TOG 0x000000ac
+#define CCM_ANALOG_PLL_VIDEO_NUM 0x000000b0
+#define CCM_ANALOG_PLL_VIDEO_DENOM 0x000000c0
+#define CCM_ANALOG_PLL_MLB 0x000000d0
+#define CCM_ANALOG_PLL_MLB_SET 0x000000d4
+#define CCM_ANALOG_PLL_MLB_CLR 0x000000d8
+#define CCM_ANALOG_PLL_MLB_TOG 0x000000dc
+#define CCM_ANALOG_PLL_ENET 0x000000e0
+#define CCM_ANALOG_PLL_ENET_SET 0x000000e4
+#define CCM_ANALOG_PLL_ENET_CLR 0x000000e8
+#define CCM_ANALOG_PLL_ENET_TOG 0x000000ec
#define CCM_ANALOG_PLL_ENET_LOCK __BIT(31)
#define CCM_ANALOG_PLL_ENET_ENET_25M_REF_EN __BIT(21) /* iMX6UL */
#define CCM_ANALOG_PLL_ENET_ENET2_125M_EN __BIT(20) /* iMX6UL */
@@ -253,7 +342,7 @@
#define CCM_ANALOG_PLL_ENET_ENABLE_125M __BIT(19) /* PCIe */
#define CCM_ANALOG_PLL_ENET_PFD_OFFSET_EN __BIT(18)
#define CCM_ANALOG_PLL_ENET_BYPASS __BIT(16)
-#define CCM_ANALOG_PLL_ENET_BYPASS_CLK_SRC(s) __SHIFTIN(s, __BITS(15, 14))
+#define CCM_ANALOG_PLL_ENET_BYPASS_CLK_SRC __BITS(15, 14)
#define CCM_ANALOG_PLL_ENET_ENET1_125M_EN __BIT(13) /* iMX6UL */
#define CCM_ANALOG_PLL_ENET_ENABLE __BIT(13) /* Ether */
#define CCM_ANALOG_PLL_ENET_POWERDOWN __BIT(12)
@@ -261,10 +350,10 @@
#define CCM_ANALOG_PLL_ENET1_DIV_SELECT_MASK __BITS(3, 2)
#define CCM_ANALOG_PLL_ENET_DIV_SELECT(d) __SHIFTIN(d, __BITS(1, 0))
#define CCM_ANALOG_PLL_ENET_DIV_SELECT_MASK __BITS(1, 0)
-#define CCM_ANALOG_PFD_480 0x000040f0
-#define CCM_ANALOG_PFD_480_SET 0x000040f4
-#define CCM_ANALOG_PFD_480_CLR 0x000040f8
-#define CCM_ANALOG_PFD_480_TOG 0x000040fc
+#define CCM_ANALOG_PFD_480 0x000000f0
+#define CCM_ANALOG_PFD_480_SET 0x000000f4
+#define CCM_ANALOG_PFD_480_CLR 0x000000f8
+#define CCM_ANALOG_PFD_480_TOG 0x000000fc
#define CCM_ANALOG_PFD_480_PFD3_CLKGATE __BIT(31)
#define CCM_ANALOG_PFD_480_PFD3_STABLE __BIT(30)
#define CCM_ANALOG_PFD_480_PFD3_FRAC __BITS(29, 24)
@@ -277,10 +366,10 @@
#define CCM_ANALOG_PFD_480_PFD0_CLKGATE __BIT(7)
#define CCM_ANALOG_PFD_480_PFD0_STABLE __BIT(6)
#define CCM_ANALOG_PFD_480_PFD0_FRAC __BITS(5, 0)
-#define CCM_ANALOG_PFD_528 0x00004100
-#define CCM_ANALOG_PFD_528_SET 0x00004104
-#define CCM_ANALOG_PFD_528_CLR 0x00004108
-#define CCM_ANALOG_PFD_528_TOG 0x0000410c
+#define CCM_ANALOG_PFD_528 0x00000100
+#define CCM_ANALOG_PFD_528_SET 0x00000104
+#define CCM_ANALOG_PFD_528_CLR 0x00000108
+#define CCM_ANALOG_PFD_528_TOG 0x0000010c
#define CCM_ANALOG_PFD_528_PFD2_CLKGATE __BIT(23)
#define CCM_ANALOG_PFD_528_PFD2_STABLE __BIT(22)
#define CCM_ANALOG_PFD_528_PFD2_FRAC __BITS(21, 16)
@@ -290,14 +379,14 @@
#define CCM_ANALOG_PFD_528_PFD0_CLKGATE __BIT(7)
#define CCM_ANALOG_PFD_528_PFD0_STABLE __BIT(6)
#define CCM_ANALOG_PFD_528_PFD0_FRAC __BITS(5, 0)
-#define CCM_ANALOG_MISC0 0x00004150
-#define CCM_ANALOG_MISC0_SET 0x00004154
-#define CCM_ANALOG_MISC0_CLR 0x00004158
-#define CCM_ANALOG_MISC0_TOG 0x0000415c
-#define CCM_ANALOG_MISC1 0x00004160
-#define CCM_ANALOG_MISC1_SET 0x00004164
-#define CCM_ANALOG_MISC1_CLR 0x00004168
-#define CCM_ANALOG_MISC1_TOG 0x0000416c
+#define CCM_ANALOG_MISC0 0x00000150
+#define CCM_ANALOG_MISC0_SET 0x00000154
+#define CCM_ANALOG_MISC0_CLR 0x00000158
+#define CCM_ANALOG_MISC0_TOG 0x0000015c
+#define CCM_ANALOG_MISC1 0x00000160
+#define CCM_ANALOG_MISC1_SET 0x00000164
+#define CCM_ANALOG_MISC1_CLR 0x00000168
+#define CCM_ANALOG_MISC1_TOG 0x0000016c
#define CCM_ANALOG_MISC1_LVDS_CLK1_SRC __BITS(4, 0)
#define CCM_ANALOG_MISC1_LVDS_CLK1_SRC_PCIE __SHIFTIN(0xa, CCM_ANALOG_MISC1_LVDS_CLK1_SRC)
#define CCM_ANALOG_MISC1_LVDS_CLK1_SRC_SATA __SHIFTIN(0xb, CCM_ANALOG_MISC1_LVDS_CLK1_SRC)
@@ -305,91 +394,39 @@
#define CCM_ANALOG_MISC1_LVDS_CLK2_OBEN __BIT(11)
#define CCM_ANALOG_MISC1_LVDS_CLK1_IBEN __BIT(12)
#define CCM_ANALOG_MISC1_LVDS_CLK2_IBEN __BIT(13)
-#define CCM_ANALOG_MISC2 0x00004170
-#define CCM_ANALOG_MISC2_SET 0x00004174
-#define CCM_ANALOG_MISC2_CLR 0x00004178
-#define CCM_ANALOG_MISC2_TOG 0x0000417C
+#define CCM_ANALOG_MISC2 0x00000170
+#define CCM_ANALOG_MISC2_SET 0x00000174
+#define CCM_ANALOG_MISC2_CLR 0x00000178
+#define CCM_ANALOG_MISC2_TOG 0x0000017C
-#define CCM_TEMPMON_TEMPSENSE0 0x00004180
+#define CCM_TEMPMON_TEMPSENSE0 0x00000180
#define CCM_TEMPMON_TEMPSENSE0_ALARM_VALUE __BIT(31, 30)
#define CCM_TEMPMON_TEMPSENSE0_TEMP_CNT __BITS(19, 8)
#define CCM_TEMPMON_TEMPSENSE0_FINISHED __BIT(2)
#define CCM_TEMPMON_TEMPSENSE0_MEASURE_TEMP __BIT(1)
#define CCM_TEMPMON_TEMPSENSE0_POWER_DOWN __BIT(0)
-#define CCM_TEMPMON_TEMPSENSE1 0x00004180
+#define CCM_TEMPMON_TEMPSENSE1 0x00000180
#define CCM_TEMPMON_TEMPSENSE1_MEASURE_FREQ __BITS(15, 0)
-#define USB_ANALOG_USB1_VBUS_DETECT 0x000041a0
-#define USB_ANALOG_USB1_CHRG_DETECT 0x000041b0
+#define USB_ANALOG_USB1_VBUS_DETECT 0x000001a0
+#define USB_ANALOG_USB1_CHRG_DETECT 0x000001b0
#define USB_ANALOG_USB_CHRG_DETECT_EN_B __BIT(20)
#define USB_ANALOG_USB_CHRG_DETECT_CHK_CHRG_B __BIT(19)
#define USB_ANALOG_USB_CHRG_DETECT_CHK_CHK_CONTACT __BIT(18)
-#define USB_ANALOG_USB1_VBUS_DETECT_STAT 0x000041c0
-#define USB_ANALOG_USB1_CHRG_DETECT_STAT 0x000041d0
-#define USB_ANALOG_USB1_MISC 0x000041f0
-#define USB_ANALOG_USB2_VBUS_DETECT 0x00004200
-#define USB_ANALOG_USB2_CHRG_DETECT 0x00004210
-#define USB_ANALOG_USB2_VBUS_DETECT_STAT 0x00004220
-#define USB_ANALOG_USB2_CHRG_DETECT_STAT 0x00004230
-#define USB_ANALOG_USB2_MISC 0x00004250
+#define USB_ANALOG_USB1_VBUS_DETECT_STAT 0x000001c0
+#define USB_ANALOG_USB1_CHRG_DETECT_STAT 0x000001d0
+#define USB_ANALOG_USB1_MISC 0x000001f0
+#define USB_ANALOG_USB2_VBUS_DETECT 0x00000200
+#define USB_ANALOG_USB2_CHRG_DETECT 0x00000210
+#define USB_ANALOG_USB2_VBUS_DETECT_STAT 0x00000220
+#define USB_ANALOG_USB2_CHRG_DETECT_STAT 0x00000230
+#define USB_ANALOG_USB2_MISC 0x00000250
-#define USB_ANALOG_DIGPROG 0x00004260
-#define USB_ANALOG_DIGPROG_SOLOLITE 0x00004280
+#define USB_ANALOG_DIGPROG 0x00000260
+#define USB_ANALOG_DIGPROG_SOLOLITE 0x00000280
#define USB_ANALOG_DIGPROG_MAJOR __BITS(23, 8)
#define USB_ANALOG_DIGPROG_MINOR __BITS(7, 0)
- /* 0x00005000 = 0x020c9000 */
-#define USBPHY1_PWD 0x00005000 /* = 020c9000 */
-#define USBPHY1_PWD_SET 0x00005004
-#define USBPHY1_PWD_CLR 0x00005008
-#define USBPHY1_PWD_TOG 0x0000500c
-#define USBPHY1_TX 0x00005010
-#define USBPHY1_TX_SET 0x00005014
-#define USBPHY1_TX_CLR 0x00005018
-#define USBPHY1_TX_TOG 0x0000501c
-#define USBPHY_TX_USBPHY_TX_EDGECTRL __BITS(28, 26)
-#define USBPHY_TX_TXCAL45DP __BITS(19, 16)
-#define USBPHY_TX_TXCAL45DN __BITS(11, 8)
-#define USBPHY_TX_D_CAL __BITS(3, 0)
-#define USBPHY1_RX 0x00005020
-#define USBPHY1_RX_SET 0x00005024
-#define USBPHY1_RX_CLR 0x00005028
-#define USBPHY1_RX_TOG 0x0000502c
-#define USBPHY1_CTRL 0x00005030
-#define USBPHY1_CTRL_SET 0x00005034
-#define USBPHY1_CTRL_CLR 0x00005038
-#define USBPHY1_CTRL_TOG 0x0000503c
-#define USBPHY_CTRL_SFTRST __BIT(31)
-#define USBPHY_CTRL_CLKGATE __BIT(30)
-#define USBPHY_CTRL_ENUTMILEVEL3 __BIT(15)
-#define USBPHY_CTRL_ENUTMILEVEL2 __BIT(14)
-#define USBPHY1_STATUS 0x00005040
-#define USBPHY1_DEBUG 0x00005050
-#define USBPHY1_DEBUG0_STATUS 0x00005060
-#define USBPHY1_DEBUG1 0x00005070
-#define USBPHY1_VERSION 0x00005080
-#define USBPHY2_PWD 0x00006000 /* = 020ca000 */
-#define USBPHY2_PWD_SET 0x00006004
-#define USBPHY2_PWD_CLR 0x00006008
-#define USBPHY2_PWD_TOG 0x0000600c
-#define USBPHY2_TX 0x00006010
-#define USBPHY2_TX_SET 0x00006014
-#define USBPHY2_TX_CLR 0x00006018
-#define USBPHY2_TX_TOG 0x0000601c
-#define USBPHY2_RX 0x00006020
-#define USBPHY2_RX_SET 0x00006024
-#define USBPHY2_RX_CLR 0x00006028
-#define USBPHY2_RX_TOG 0x0000602c
-#define USBPHY2_CTRL 0x00006030
-#define USBPHY2_CTRL_SET 0x00006034
-#define USBPHY2_CTRL_CLR 0x00006038
-#define USBPHY2_CTRL_TOG 0x0000603c
-#define USBPHY2_STATUS 0x00006040
-#define USBPHY2_DEBUG 0x00006050
-#define USBPHY2_DEBUG0_STATUS 0x00006060
-#define USBPHY2_DEBUG1 0x00006070
-#define USBPHY2_VERSION 0x00006080
-
#endif /* _ARM_IMX_IMX6_CCMREG_H */
Index: src/sys/arch/arm/imx/imx6_axi.c
diff -u src/sys/arch/arm/imx/imx6_axi.c:1.3 src/sys/arch/arm/imx/imx6_axi.c:1.4
--- src/sys/arch/arm/imx/imx6_axi.c:1.3 Thu Aug 17 09:11:04 2017
+++ src/sys/arch/arm/imx/imx6_axi.c Thu Nov 9 05:57:23 2017
@@ -1,4 +1,4 @@
-/* $NetBSD: imx6_axi.c,v 1.3 2017/08/17 09:11:04 hkenken Exp $ */
+/* $NetBSD: imx6_axi.c,v 1.4 2017/11/09 05:57:23 hkenken Exp $ */
/*
* Copyright (c) 2014 Ryo Shimizu <r...@nerv.org>
@@ -27,7 +27,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: imx6_axi.c,v 1.3 2017/08/17 09:11:04 hkenken Exp $");
+__KERNEL_RCSID(0, "$NetBSD: imx6_axi.c,v 1.4 2017/11/09 05:57:23 hkenken Exp $");
#include <sys/param.h>
#include <sys/bus.h>
@@ -103,7 +103,8 @@ axi_critical_search(device_t parent, str
(strcmp(cf->cf_name, "imxgpio") != 0) &&
(strcmp(cf->cf_name, "imxiomux") != 0) &&
(strcmp(cf->cf_name, "imxocotp") != 0) &&
- (strcmp(cf->cf_name, "imxuart") != 0))
+ (strcmp(cf->cf_name, "imxuart") != 0) &&
+ (strcmp(cf->cf_name, "imxusbphy") != 0))
return 0;
aa->aa_name = cf->cf_name;
Index: src/sys/arch/arm/imx/imx6_board.c
diff -u src/sys/arch/arm/imx/imx6_board.c:1.8 src/sys/arch/arm/imx/imx6_board.c:1.9
--- src/sys/arch/arm/imx/imx6_board.c:1.8 Fri Jun 9 18:14:59 2017
+++ src/sys/arch/arm/imx/imx6_board.c Thu Nov 9 05:57:23 2017
@@ -1,4 +1,4 @@
-/* $NetBSD: imx6_board.c,v 1.8 2017/06/09 18:14:59 ryo Exp $ */
+/* $NetBSD: imx6_board.c,v 1.9 2017/11/09 05:57:23 hkenken Exp $ */
/*
* Copyright (c) 2012 Genetec Corporation. All rights reserved.
@@ -27,7 +27,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(1, "$NetBSD: imx6_board.c,v 1.8 2017/06/09 18:14:59 ryo Exp $");
+__KERNEL_RCSID(1, "$NetBSD: imx6_board.c,v 1.9 2017/11/09 05:57:23 hkenken Exp $");
#include "opt_imx.h"
#include "arml2cc.h"
@@ -189,7 +189,7 @@ imx6_armrootclk(void)
uint32_t v;
v = bus_space_read_4(imx6_ioreg_bst, imx6_ioreg_bsh,
- AIPS1_CCM_BASE + CCM_ANALOG_PLL_ARM);
+ AIPS1_CCM_ANALOG_BASE + CCM_ANALOG_PLL_ARM);
clk = IMX6_OSC_FREQ * (v & CCM_ANALOG_PLL_ARM_DIV_SELECT) / 2;
v = bus_space_read_4(imx6_ioreg_bst, imx6_ioreg_bsh,
AIPS1_CCM_BASE + CCM_CACRR);
Index: src/sys/arch/arm/imx/imx6_ccm.c
diff -u src/sys/arch/arm/imx/imx6_ccm.c:1.6 src/sys/arch/arm/imx/imx6_ccm.c:1.7
--- src/sys/arch/arm/imx/imx6_ccm.c:1.6 Fri Jun 9 18:14:59 2017
+++ src/sys/arch/arm/imx/imx6_ccm.c Thu Nov 9 05:57:23 2017
@@ -1,4 +1,4 @@
-/* $NetBSD: imx6_ccm.c,v 1.6 2017/06/09 18:14:59 ryo Exp $ */
+/* $NetBSD: imx6_ccm.c,v 1.7 2017/11/09 05:57:23 hkenken Exp $ */
/*
* Copyright (c) 2010-2012, 2014 Genetec Corporation. All rights reserved.
@@ -31,7 +31,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: imx6_ccm.c,v 1.6 2017/06/09 18:14:59 ryo Exp $");
+__KERNEL_RCSID(0, "$NetBSD: imx6_ccm.c,v 1.7 2017/11/09 05:57:23 hkenken Exp $");
#include "opt_imx.h"
#include "opt_imx6clk.h"
@@ -63,6 +63,7 @@ struct imxccm_softc {
device_t sc_dev;
bus_space_tag_t sc_iot;
bus_space_handle_t sc_ioh;
+ bus_space_handle_t sc_ioh_analog;
/* for sysctl */
struct sysctllog *sc_log;
@@ -118,8 +119,15 @@ imxccm_attach(device_t parent, device_t
sc->sc_iot = iot;
sc->sc_log = NULL;
- if (bus_space_map(iot, aa->aa_addr, IMX6_CCM_SIZE, 0, &sc->sc_ioh)) {
- aprint_error(": can't map registers\n");
+ if (bus_space_map(iot, aa->aa_addr, AIPS1_CCM_SIZE, 0, &sc->sc_ioh)) {
+ aprint_error(": can't map CCM registers\n");
+ return;
+ }
+
+ if (bus_space_map(iot, IMX6_AIPS1_BASE + AIPS1_CCM_ANALOG_BASE,
+ AIPS1_CCM_ANALOG_SIZE, 0, &sc->sc_ioh_analog)) {
+ aprint_error(": can't map CCM_ANALOG registers\n");
+ bus_space_unmap(iot, sc->sc_ioh, AIPS1_CCM_SIZE);
return;
}
@@ -414,8 +422,29 @@ imx6_ccm_write(uint32_t reg, uint32_t va
bus_space_write_4(ccm_softc->sc_iot, ccm_softc->sc_ioh, reg, val);
}
+
+uint32_t
+imx6_ccm_analog_read(uint32_t reg)
+{
+ if (ccm_softc == NULL)
+ return 0;
+
+ return bus_space_read_4(ccm_softc->sc_iot, ccm_softc->sc_ioh_analog,
+ reg);
+}
+
+void
+imx6_ccm_analog_write(uint32_t reg, uint32_t val)
+{
+ if (ccm_softc == NULL)
+ return;
+
+ bus_space_write_4(ccm_softc->sc_iot, ccm_softc->sc_ioh_analog, reg,
+ val);
+}
+
int
-imx6_set_clock(enum imx6_clock clk, uint32_t freq)
+imx6_set_clock(enum imx6_clock_id clk, uint32_t freq)
{
uint32_t v;
@@ -434,11 +463,13 @@ imx6_set_clock(enum imx6_clock clk, uint
v = imx6_ccm_read(CCM_CACRR);
v &= ~CCM_CACRR_ARM_PODF;
- imx6_ccm_write(CCM_CACRR, v | __SHIFTIN(cacrr, CCM_CACRR_ARM_PODF));
+ imx6_ccm_write(CCM_CACRR,
+ v | __SHIFTIN(cacrr, CCM_CACRR_ARM_PODF));
- v = imx6_ccm_read(CCM_ANALOG_PLL_ARM);
+ v = imx6_ccm_analog_read(CCM_ANALOG_PLL_ARM);
v &= ~CCM_ANALOG_PLL_ARM_DIV_SELECT;
- imx6_ccm_write(CCM_ANALOG_PLL_ARM, v | __SHIFTIN(pll, CCM_ANALOG_PLL_ARM_DIV_SELECT));
+ imx6_ccm_analog_write(CCM_ANALOG_PLL_ARM,
+ v | __SHIFTIN(pll, CCM_ANALOG_PLL_ARM_DIV_SELECT));
v = imx6_get_clock(IMX6CLK_ARM_ROOT);
cpufreq_set_all(v);
@@ -462,7 +493,7 @@ imx6_set_clock(enum imx6_clock clk, uint
}
uint32_t
-imx6_get_clock(enum imx6_clock clk)
+imx6_get_clock(enum imx6_clock_id clk)
{
uint32_t d, denom, num, sel, v;
uint64_t freq;
@@ -473,33 +504,33 @@ imx6_get_clock(enum imx6_clock clk)
switch (clk) {
/* CLOCK SWITCHER */
case IMX6CLK_PLL1:
- v = imx6_ccm_read(CCM_ANALOG_PLL_ARM);
+ v = imx6_ccm_analog_read(CCM_ANALOG_PLL_ARM);
freq = IMX6_OSC_FREQ * (v & CCM_ANALOG_PLL_ARM_DIV_SELECT) / 2;
break;
case IMX6CLK_PLL2:
- v = imx6_ccm_read(CCM_ANALOG_PLL_SYS);
+ v = imx6_ccm_analog_read(CCM_ANALOG_PLL_SYS);
freq = IMX6_OSC_FREQ * ((v & CCM_ANALOG_PLL_SYS_DIV_SELECT) ? 22 : 20);
break;
case IMX6CLK_PLL3:
- v = imx6_ccm_read(CCM_ANALOG_PLL_USB1);
+ v = imx6_ccm_analog_read(CCM_ANALOG_PLL_USB1);
freq = IMX6_OSC_FREQ * ((v & CCM_ANALOG_PLL_USB1_DIV_SELECT) ? 22 : 20);
break;
case IMX6CLK_PLL4:
- v = imx6_ccm_read(CCM_ANALOG_PLL_AUDIO);
+ v = imx6_ccm_analog_read(CCM_ANALOG_PLL_AUDIO);
d = __SHIFTOUT(v, CCM_ANALOG_PLL_AUDIO_DIV_SELECT);
- num = imx6_ccm_read(CCM_ANALOG_PLL_AUDIO_NUM);
- denom = imx6_ccm_read(CCM_ANALOG_PLL_AUDIO_DENOM);
+ num = imx6_ccm_analog_read(CCM_ANALOG_PLL_AUDIO_NUM);
+ denom = imx6_ccm_analog_read(CCM_ANALOG_PLL_AUDIO_DENOM);
freq = (uint64_t)IMX6_OSC_FREQ * (d + num / denom);
d = __SHIFTOUT(v, CCM_ANALOG_PLL_AUDIO_POST_DIV_SELECT);
freq = freq >> (2 - d);
break;
case IMX6CLK_PLL5:
- v = imx6_ccm_read(CCM_ANALOG_PLL_VIDEO);
+ v = imx6_ccm_analog_read(CCM_ANALOG_PLL_VIDEO);
d = __SHIFTOUT(v, CCM_ANALOG_PLL_VIDEO_DIV_SELECT);
- num = imx6_ccm_read(CCM_ANALOG_PLL_VIDEO_NUM);
- denom = imx6_ccm_read(CCM_ANALOG_PLL_VIDEO_DENOM);
+ num = imx6_ccm_analog_read(CCM_ANALOG_PLL_VIDEO_NUM);
+ denom = imx6_ccm_analog_read(CCM_ANALOG_PLL_VIDEO_DENOM);
freq = (uint64_t)IMX6_OSC_FREQ * (d + num / denom);
d = __SHIFTOUT(v, CCM_ANALOG_PLL_VIDEO_POST_DIV_SELECT);
freq = freq >> (2 - d);
@@ -507,7 +538,7 @@ imx6_get_clock(enum imx6_clock clk)
case IMX6CLK_PLL6:
/* XXX: iMX6UL has 2 div. which? */
- v = imx6_ccm_read(CCM_ANALOG_PLL_ENET);
+ v = imx6_ccm_analog_read(CCM_ANALOG_PLL_ENET);
switch (v & CCM_ANALOG_PLL_ENET_DIV_SELECT_MASK) {
case 0:
freq = 25 * 1000 * 1000;
@@ -524,8 +555,8 @@ imx6_get_clock(enum imx6_clock clk)
}
break;
case IMX6CLK_PLL7:
- v = imx6_ccm_read(CCM_ANALOG_PLL_USB2);
- freq = IMX6_OSC_FREQ * ((v & CCM_ANALOG_PLL_USBn_DIV_SELECT(1)) ? 22 : 20);
+ v = imx6_ccm_analog_read(CCM_ANALOG_PLL_USB2);
+ freq = IMX6_OSC_FREQ * ((v & CCM_ANALOG_PLL_USBn_DIV_SELECT) ? 22 : 20);
break;
#if 0
@@ -536,37 +567,37 @@ imx6_get_clock(enum imx6_clock clk)
case IMX6CLK_PLL2_PFD0:
freq = imx6_get_clock(IMX6CLK_PLL2);
- v = imx6_ccm_read(CCM_ANALOG_PFD_528);
+ v = imx6_ccm_analog_read(CCM_ANALOG_PFD_528);
freq = freq * 18 / __SHIFTOUT(v, CCM_ANALOG_PFD_528_PFD0_FRAC);
break;
case IMX6CLK_PLL2_PFD1:
freq = imx6_get_clock(IMX6CLK_PLL2);
- v = imx6_ccm_read(CCM_ANALOG_PFD_528);
+ v = imx6_ccm_analog_read(CCM_ANALOG_PFD_528);
freq = freq * 18 / __SHIFTOUT(v, CCM_ANALOG_PFD_528_PFD1_FRAC);
break;
case IMX6CLK_PLL2_PFD2:
freq = imx6_get_clock(IMX6CLK_PLL2);
- v = imx6_ccm_read(CCM_ANALOG_PFD_528);
+ v = imx6_ccm_analog_read(CCM_ANALOG_PFD_528);
freq = freq * 18 / __SHIFTOUT(v, CCM_ANALOG_PFD_528_PFD2_FRAC);
break;
case IMX6CLK_PLL3_PFD3:
freq = imx6_get_clock(IMX6CLK_PLL3);
- v = imx6_ccm_read(CCM_ANALOG_PFD_480);
+ v = imx6_ccm_analog_read(CCM_ANALOG_PFD_480);
freq = freq * 18 / __SHIFTOUT(v, CCM_ANALOG_PFD_480_PFD3_FRAC);
break;
case IMX6CLK_PLL3_PFD2:
freq = imx6_get_clock(IMX6CLK_PLL3);
- v = imx6_ccm_read(CCM_ANALOG_PFD_480);
+ v = imx6_ccm_analog_read(CCM_ANALOG_PFD_480);
freq = freq * 18 / __SHIFTOUT(v, CCM_ANALOG_PFD_480_PFD2_FRAC);
break;
case IMX6CLK_PLL3_PFD1:
freq = imx6_get_clock(IMX6CLK_PLL3);
- v = imx6_ccm_read(CCM_ANALOG_PFD_480);
+ v = imx6_ccm_analog_read(CCM_ANALOG_PFD_480);
freq = freq * 18 / __SHIFTOUT(v, CCM_ANALOG_PFD_480_PFD1_FRAC);
break;
case IMX6CLK_PLL3_PFD0:
freq = imx6_get_clock(IMX6CLK_PLL3);
- v = imx6_ccm_read(CCM_ANALOG_PFD_480);
+ v = imx6_ccm_analog_read(CCM_ANALOG_PFD_480);
freq = freq * 18 / __SHIFTOUT(v, CCM_ANALOG_PFD_480_PFD0_FRAC);
break;
@@ -865,26 +896,26 @@ imx6_pll_power(uint32_t pllreg, int on,
switch (pllreg) {
case CCM_ANALOG_PLL_USB1:
case CCM_ANALOG_PLL_USB2:
- v = imx6_ccm_read(pllreg);
+ v = imx6_ccm_analog_read(pllreg);
if (on) {
v |= en;
v &= ~CCM_ANALOG_PLL_USBn_BYPASS;
} else {
v &= ~en;
}
- imx6_ccm_write(pllreg, v);
+ imx6_ccm_analog_write(pllreg, v);
return 0;
case CCM_ANALOG_PLL_ENET:
- v = imx6_ccm_read(pllreg);
+ v = imx6_ccm_analog_read(pllreg);
if (on)
v &= ~CCM_ANALOG_PLL_ENET_POWERDOWN;
else
v |= CCM_ANALOG_PLL_ENET_POWERDOWN;
- imx6_ccm_write(pllreg, v);
+ imx6_ccm_analog_write(pllreg, v);
for (timeout = 100000; timeout > 0; timeout--) {
- if (imx6_ccm_read(pllreg) &
+ if (imx6_ccm_analog_read(pllreg) &
CCM_ANALOG_PLL_ENET_LOCK)
break;
}
@@ -894,12 +925,12 @@ imx6_pll_power(uint32_t pllreg, int on,
v |= CCM_ANALOG_PLL_ENET_ENABLE;
if (on) {
v &= ~CCM_ANALOG_PLL_ENET_BYPASS;
- imx6_ccm_write(pllreg, v);
+ imx6_ccm_analog_write(pllreg, v);
v |= en;
} else {
v &= ~en;
}
- imx6_ccm_write(pllreg, v);
+ imx6_ccm_analog_write(pllreg, v);
return 0;
case CCM_ANALOG_PLL_ARM:
Index: src/sys/arch/arm/imx/imx6_reg.h
diff -u src/sys/arch/arm/imx/imx6_reg.h:1.6 src/sys/arch/arm/imx/imx6_reg.h:1.7
--- src/sys/arch/arm/imx/imx6_reg.h:1.6 Fri Jun 9 18:14:59 2017
+++ src/sys/arch/arm/imx/imx6_reg.h Thu Nov 9 05:57:23 2017
@@ -1,4 +1,4 @@
-/* $NetBSD: imx6_reg.h,v 1.6 2017/06/09 18:14:59 ryo Exp $ */
+/* $NetBSD: imx6_reg.h,v 1.7 2017/11/09 05:57:23 hkenken Exp $ */
/*-
* Copyright (c) 2012 The NetBSD Foundation, Inc.
* All rights reserved.
@@ -141,8 +141,14 @@
#define AIPS1_SNVS_SIZE 0x00000c00
#define AIPS1_USBPHY2_BASE 0x000ca000
#define AIPS1_USBPHY1_BASE 0x000c9000
-#define AIPS1_ANATOP_DIG_BASE 0x000c8000
+#define AIPS1_USBPHY_SIZE 0x00001000
+
+#define AIPS1_CCM_ANALOG_BASE 0x000c8000
+#define AIPS1_CCM_ANALOG_SIZE 0x00001000
+
#define AIPS1_CCM_BASE 0x000c4000
+#define AIPS1_CCM_SIZE 0x00004000
+
#define AIPS1_WDOG2_BASE 0x000c0000
#define AIPS1_WDOG1_BASE 0x000bc000
#define AIPS1_WDOG_SIZE 0x00000010
Index: src/sys/arch/arm/imx/imx6_ccmvar.h
diff -u src/sys/arch/arm/imx/imx6_ccmvar.h:1.4 src/sys/arch/arm/imx/imx6_ccmvar.h:1.5
--- src/sys/arch/arm/imx/imx6_ccmvar.h:1.4 Thu Nov 24 03:59:36 2016
+++ src/sys/arch/arm/imx/imx6_ccmvar.h Thu Nov 9 05:57:23 2017
@@ -1,4 +1,4 @@
-/* $NetBSD: imx6_ccmvar.h,v 1.4 2016/11/24 03:59:36 hkenken Exp $ */
+/* $NetBSD: imx6_ccmvar.h,v 1.5 2017/11/09 05:57:23 hkenken Exp $ */
/*
* Copyright (c) 2012 Genetec Corporation. All rights reserved.
* Written by Hashimoto Kenichi for Genetec Corporation.
@@ -28,7 +28,7 @@
#ifndef _ARM_IMX_IMX6_CCMVAR_H_
#define _ARM_IMX_IMX6_CCMVAR_H_
-enum imx6_clock {
+enum imx6_clock_id {
IMX6CLK_PLL1, /* = PLL_ARM */
IMX6CLK_PLL2, /* = PLL_SYS = 528_PLL (24MHz * 22) */
IMX6CLK_PLL3, /* = PLL_USB1 = 480_PLL1 */
@@ -73,11 +73,13 @@ enum imx6_clock {
IMX6CLK_LDB_DI1_SERIAL_CLK_ROOT,
};
-uint32_t imx6_get_clock(enum imx6_clock);
-int imx6_set_clock(enum imx6_clock, uint32_t);
+uint32_t imx6_get_clock(enum imx6_clock_id);
+int imx6_set_clock(enum imx6_clock_id, uint32_t);
int imx6_pll_power(uint32_t, int, uint32_t);
uint32_t imx6_ccm_read(uint32_t);
void imx6_ccm_write(uint32_t, uint32_t);
+uint32_t imx6_ccm_analog_read(uint32_t);
+void imx6_ccm_analog_write(uint32_t, uint32_t);
#endif /* _ARM_IMX_IMX6_CCMVAR_H_ */
Index: src/sys/arch/arm/imx/imx6_pcie.c
diff -u src/sys/arch/arm/imx/imx6_pcie.c:1.4 src/sys/arch/arm/imx/imx6_pcie.c:1.5
--- src/sys/arch/arm/imx/imx6_pcie.c:1.4 Tue Oct 24 09:11:51 2017
+++ src/sys/arch/arm/imx/imx6_pcie.c Thu Nov 9 05:57:23 2017
@@ -1,4 +1,4 @@
-/* $NetBSD: imx6_pcie.c,v 1.4 2017/10/24 09:11:51 hkenken Exp $ */
+/* $NetBSD: imx6_pcie.c,v 1.5 2017/11/09 05:57:23 hkenken Exp $ */
/*
* Copyright (c) 2016 Genetec Corporation. All rights reserved.
@@ -31,7 +31,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: imx6_pcie.c,v 1.4 2017/10/24 09:11:51 hkenken Exp $");
+__KERNEL_RCSID(0, "$NetBSD: imx6_pcie.c,v 1.5 2017/11/09 05:57:23 hkenken Exp $");
#include "opt_pci.h"
@@ -164,12 +164,12 @@ imx6pcie_clock_enable(struct imx6pcie_so
{
uint32_t v;
- v = imx6_ccm_read(CCM_ANALOG_MISC1);
+ v = imx6_ccm_analog_read(CCM_ANALOG_MISC1);
v &= ~CCM_ANALOG_MISC1_LVDS_CLK1_IBEN;
v &= ~CCM_ANALOG_MISC1_LVDS_CLK1_SRC;
v |= CCM_ANALOG_MISC1_LVDS_CLK1_OBEN;
v |= CCM_ANALOG_MISC1_LVDS_CLK1_SRC_SATA;
- imx6_ccm_write(CCM_ANALOG_MISC1, v);
+ imx6_ccm_analog_write(CCM_ANALOG_MISC1, v);
/* select PCIe clock source from axi */
v = imx6_ccm_read(CCM_CBCMR);
Index: src/sys/arch/evbarm/conf/CUBOX-I
diff -u src/sys/arch/evbarm/conf/CUBOX-I:1.11 src/sys/arch/evbarm/conf/CUBOX-I:1.12
--- src/sys/arch/evbarm/conf/CUBOX-I:1.11 Thu Sep 14 07:58:40 2017
+++ src/sys/arch/evbarm/conf/CUBOX-I Thu Nov 9 05:57:23 2017
@@ -1,4 +1,4 @@
-# $NetBSD: CUBOX-I,v 1.11 2017/09/14 07:58:40 mrg Exp $
+# $NetBSD: CUBOX-I,v 1.12 2017/11/09 05:57:23 hkenken Exp $
#
# CuBox-i
# - http://www.solid-run.com/products/cubox-i-mini-computer/
@@ -296,6 +296,8 @@ ukphy* at mii? phy ? # generic unknown
urlphy* at mii? phy ? # Realtek RTL8150L internal PHYs
# USB Controller and Devices
+imxusbphy0 at axi? addr 0x020c9000
+imxusbphy1 at axi? addr 0x020ca000
imxusbc0 at axi? addr 0x02184000
ehci0 at imxusbc0 unit 0 irq 75 # OTG
ehci1 at imxusbc0 unit 1 irq 72 # Host1
Index: src/sys/arch/evbarm/conf/HUMMINGBOARD
diff -u src/sys/arch/evbarm/conf/HUMMINGBOARD:1.1 src/sys/arch/evbarm/conf/HUMMINGBOARD:1.2
--- src/sys/arch/evbarm/conf/HUMMINGBOARD:1.1 Thu Nov 24 12:06:44 2016
+++ src/sys/arch/evbarm/conf/HUMMINGBOARD Thu Nov 9 05:57:23 2017
@@ -1,5 +1,5 @@
#
-# $NetBSD: HUMMINGBOARD,v 1.1 2016/11/24 12:06:44 hkenken Exp $
+# $NetBSD: HUMMINGBOARD,v 1.2 2017/11/09 05:57:23 hkenken Exp $
#
# Hummingboard -- Freescale i.MX6 Eval Board Kernel
#
@@ -132,6 +132,8 @@ ld* at sdmmc? # MMC/SD card
#options SDMMC_DEBUG
# USB
+imxusbphy0 at axi? addr 0x020c9000
+imxusbphy1 at axi? addr 0x020ca000
imxusbc0 at axi? addr 0x02184000
ehci0 at imxusbc0 unit 0 irq 75 # OTG
ehci1 at imxusbc0 unit 1 irq 72 # Host1
@@ -154,5 +156,5 @@ pci* at imxpcie0
ppb* at pci? dev ? function ?
pci* at ppb?
-iwn* at pci? dev ? function ? # Intel PRO/Wireless 4965AGN
-iwm* at pci? dev ? function ? # Intel Centrino 7260
+# local configuration
+cinclude "arch/evbarm/conf/HUMMINGBOARD.local"
Index: src/sys/arch/evbarm/conf/IMX6UL-STARTER
diff -u src/sys/arch/evbarm/conf/IMX6UL-STARTER:1.4 src/sys/arch/evbarm/conf/IMX6UL-STARTER:1.5
--- src/sys/arch/evbarm/conf/IMX6UL-STARTER:1.4 Thu Sep 14 07:58:40 2017
+++ src/sys/arch/evbarm/conf/IMX6UL-STARTER Thu Nov 9 05:57:23 2017
@@ -1,4 +1,4 @@
-# $NetBSD: IMX6UL-STARTER,v 1.4 2017/09/14 07:58:40 mrg Exp $
+# $NetBSD: IMX6UL-STARTER,v 1.5 2017/11/09 05:57:23 hkenken Exp $
#
# IMX6UL-STARTER - Freescale i.MX6UL Evaluation Board
#
@@ -285,6 +285,8 @@ ukphy* at mii? phy ? # generic unknown
urlphy* at mii? phy ? # Realtek RTL8150L internal PHYs
# USB Controller and Devices
+imxusbphy0 at axi? addr 0x020c9000
+imxusbphy1 at axi? addr 0x020ca000
imxusbc0 at axi? addr 0x02184000
ehci0 at imxusbc0 unit 0 irq 75 # USBOTG1
ehci1 at imxusbc0 unit 1 irq 74 # USBOTG2
Index: src/sys/arch/evbarm/conf/NITROGEN6X
diff -u src/sys/arch/evbarm/conf/NITROGEN6X:1.13 src/sys/arch/evbarm/conf/NITROGEN6X:1.14
--- src/sys/arch/evbarm/conf/NITROGEN6X:1.13 Thu Sep 14 07:58:40 2017
+++ src/sys/arch/evbarm/conf/NITROGEN6X Thu Nov 9 05:57:23 2017
@@ -1,4 +1,4 @@
-# $NetBSD: NITROGEN6X,v 1.13 2017/09/14 07:58:40 mrg Exp $
+# $NetBSD: NITROGEN6X,v 1.14 2017/11/09 05:57:23 hkenken Exp $
#
# Nitrogen6X
# - http://boundarydevices.com/products/nitrogen6x-board-imx6-arm-cortex-a9-sbc/
@@ -285,6 +285,8 @@ ukphy* at mii? phy ? # generic unknown
urlphy* at mii? phy ? # Realtek RTL8150L internal PHYs
# USB Controller and Devices
+imxusbphy0 at axi? addr 0x020c9000
+imxusbphy1 at axi? addr 0x020ca000
imxusbc0 at axi? addr 0x02184000
ehci0 at imxusbc0 unit 0 irq 75 # OTG
ehci1 at imxusbc0 unit 1 irq 72 # Host1
Index: src/sys/arch/evbarm/nitrogen6/nitrogen6_usb.c
diff -u src/sys/arch/evbarm/nitrogen6/nitrogen6_usb.c:1.2 src/sys/arch/evbarm/nitrogen6/nitrogen6_usb.c:1.3
--- src/sys/arch/evbarm/nitrogen6/nitrogen6_usb.c:1.2 Thu Nov 24 03:59:36 2016
+++ src/sys/arch/evbarm/nitrogen6/nitrogen6_usb.c Thu Nov 9 05:57:23 2017
@@ -1,4 +1,4 @@
-/* $NetBSD: nitrogen6_usb.c,v 1.2 2016/11/24 03:59:36 hkenken Exp $ */
+/* $NetBSD: nitrogen6_usb.c,v 1.3 2017/11/09 05:57:23 hkenken Exp $ */
/*
* Copyright (c) 2013 Genetec Corporation. All rights reserved.
@@ -27,7 +27,7 @@
*
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: nitrogen6_usb.c,v 1.2 2016/11/24 03:59:36 hkenken Exp $");
+__KERNEL_RCSID(0, "$NetBSD: nitrogen6_usb.c,v 1.3 2017/11/09 05:57:23 hkenken Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -124,39 +124,19 @@ init_otg(struct imxehci_softc *sc)
sc->sc_iftype = IMXUSBC_IF_UTMI_WIDE;
/* USB1 power */
- imx6_ccm_write(USB_ANALOG_USB1_CHRG_DETECT,
+ imx6_ccm_analog_write(USB_ANALOG_USB1_CHRG_DETECT,
USB_ANALOG_USB_CHRG_DETECT_EN_B |
USB_ANALOG_USB_CHRG_DETECT_CHK_CHRG_B);
imx6_pll_power(CCM_ANALOG_PLL_USB1, 1, CCM_ANALOG_PLL_USBn_ENABLE);
- imx6_ccm_write(CCM_ANALOG_PLL_USB1_CLR,
+ imx6_ccm_analog_write(CCM_ANALOG_PLL_USB1_CLR,
CCM_ANALOG_PLL_USBn_BYPASS);
- imx6_ccm_write(CCM_ANALOG_PLL_USB1_SET,
+ imx6_ccm_analog_write(CCM_ANALOG_PLL_USB1_SET,
CCM_ANALOG_PLL_USBn_ENABLE |
CCM_ANALOG_PLL_USBn_POWER |
CCM_ANALOG_PLL_USBn_EN_USB_CLK);
- /* USBPHY enable */
- /* PHY1 */
- imx6_ccm_write(USBPHY1_CTRL, USBPHY_CTRL_CLKGATE);
-
imxehci_reset(sc);
- v = imx6_ccm_read(USBPHY1_CTRL);
- v |= USBPHY_CTRL_SFTRST;
- imx6_ccm_write(USBPHY1_CTRL, v);
- delay(100);
-
- v = imx6_ccm_read(USBPHY1_CTRL);
- v &= ~(USBPHY_CTRL_SFTRST | USBPHY_CTRL_CLKGATE);
- imx6_ccm_write(USBPHY1_CTRL, v);
- delay(100);
-
- imx6_ccm_write(USBPHY1_PWD, 0);
-
- v = imx6_ccm_read(USBPHY1_CTRL);
- v |= USBPHY_CTRL_ENUTMILEVEL2 | USBPHY_CTRL_ENUTMILEVEL3;
- imx6_ccm_write(USBPHY1_CTRL, v);
-
v = bus_space_read_4(usbc->sc_iot, usbc->sc_ioh, USBNC_USB_OTG_CTRL);
v |= USBNC_USB_OTG_CTRL_WKUP_VBUS_EN;
v |= USBNC_USB_OTG_CTRL_OVER_CUR_DIS;
@@ -173,12 +153,12 @@ init_h1(struct imxehci_softc *sc)
sc->sc_iftype = IMXUSBC_IF_UTMI_WIDE;
- imx6_ccm_write(USB_ANALOG_USB2_CHRG_DETECT,
+ imx6_ccm_analog_write(USB_ANALOG_USB2_CHRG_DETECT,
USB_ANALOG_USB_CHRG_DETECT_EN_B |
USB_ANALOG_USB_CHRG_DETECT_CHK_CHRG_B);
- imx6_ccm_write(CCM_ANALOG_PLL_USB2_CLR,
+ imx6_ccm_analog_write(CCM_ANALOG_PLL_USB2_CLR,
CCM_ANALOG_PLL_USBn_BYPASS);
- imx6_ccm_write(CCM_ANALOG_PLL_USB2_SET,
+ imx6_ccm_analog_write(CCM_ANALOG_PLL_USB2_SET,
CCM_ANALOG_PLL_USBn_ENABLE |
CCM_ANALOG_PLL_USBn_POWER |
CCM_ANALOG_PLL_USBn_EN_USB_CLK);
@@ -188,24 +168,8 @@ init_h1(struct imxehci_softc *sc)
v |= USBNC_USB_UH1_CTRL_OVER_CUR_DIS;
bus_space_write_4(usbc->sc_iot, usbc->sc_ioh, USBNC_USB_UH1_CTRL, v);
- /* gate clocks */
- imx6_ccm_write(USBPHY2_CTRL_CLR, USBPHY_CTRL_CLKGATE);
-
/* do reset */
imxehci_reset(sc);
- imx6_ccm_write(USBPHY2_CTRL_SET, USBPHY_CTRL_SFTRST);
- delay(100);
-
- /* clear reset, and run clocks */
- imx6_ccm_write(USBPHY2_CTRL_CLR, USBPHY_CTRL_SFTRST | USBPHY_CTRL_CLKGATE);
- delay(100);
-
- /* power on */
- imx6_ccm_write(USBPHY2_PWD, 0);
-
- /* UTMI+Level2, Level3 */
- imx6_ccm_write(USBPHY2_CTRL_SET,
- USBPHY_CTRL_ENUTMILEVEL2 | USBPHY_CTRL_ENUTMILEVEL3);
/* set mode */
v = bus_space_read_4(usbc->sc_iot, usbc->sc_ioh, USBC_UH1_USBMODE);
Added files:
Index: src/sys/arch/arm/imx/imx6_usbphy.c
diff -u /dev/null src/sys/arch/arm/imx/imx6_usbphy.c:1.1
--- /dev/null Thu Nov 9 05:57:23 2017
+++ src/sys/arch/arm/imx/imx6_usbphy.c Thu Nov 9 05:57:23 2017
@@ -0,0 +1,139 @@
+/* $NetBSD: imx6_usbphy.c,v 1.1 2017/11/09 05:57:23 hkenken Exp $ */
+
+/*
+ * Copyright (c) 2017 Genetec Corporation. All rights reserved.
+ * Written by Hashimoto Kenichi for Genetec Corporation.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY GENETEC CORPORATION ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL GENETEC CORPORATION
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include "locators.h"
+#include "ohci.h"
+#include "ehci.h"
+
+#include <sys/cdefs.h>
+
+__KERNEL_RCSID(1, "$NetBSD: imx6_usbphy.c,v 1.1 2017/11/09 05:57:23 hkenken Exp $");
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/kernel.h>
+#include <sys/intr.h>
+#include <sys/bus.h>
+#include <sys/device.h>
+#include <sys/proc.h>
+#include <sys/queue.h>
+#include <sys/kmem.h>
+#include <sys/gpio.h>
+
+#include <dev/usb/usb.h>
+#include <dev/usb/usbdi.h>
+#include <dev/usb/usbdivar.h>
+#include <dev/usb/usb_mem.h>
+
+#include <arm/imx/imx6_reg.h>
+#include <arm/imx/imx6var.h>
+
+#include <arm/imx/imx6_usbphyreg.h>
+
+struct imx6_usbphy_softc {
+ device_t sc_dev;
+ bus_space_tag_t sc_bst;
+ bus_space_handle_t sc_bsh;
+};
+
+static int imx6_usbphy_match(device_t, cfdata_t, void *);
+static void imx6_usbphy_attach(device_t, device_t, void *);
+
+CFATTACH_DECL_NEW(imxusbphy, sizeof(struct imx6_usbphy_softc),
+ imx6_usbphy_match, imx6_usbphy_attach, NULL, NULL);
+
+#define USBPHY_READ(sc, reg) \
+ bus_space_read_4((sc)->sc_bst, (sc)->sc_bsh, (reg))
+#define USBPHY_WRITE(sc, reg, val) \
+ bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))
+
+static int
+imx6_usbphy_enable(device_t dev, void *priv, bool enable)
+{
+ struct imx6_usbphy_softc * const sc = device_private(dev);
+
+ /* USBPHY enable */
+ USBPHY_WRITE(sc, USBPHY_CTRL, USBPHY_CTRL_CLKGATE);
+
+ /* do reset */
+ USBPHY_WRITE(sc, USBPHY_CTRL_SET, USBPHY_CTRL_SFTRST);
+ delay(100);
+
+ /* clear reset, and run clocks */
+ USBPHY_WRITE(sc, USBPHY_CTRL_CLR, USBPHY_CTRL_SFTRST | USBPHY_CTRL_CLKGATE);
+ delay(100);
+
+ /* power on */
+ USBPHY_WRITE(sc, USBPHY_PWD, 0);
+
+ /* UTMI+Level2, Level3 */
+ USBPHY_WRITE(sc, USBPHY_CTRL_SET,
+ USBPHY_CTRL_ENUTMILEVEL2 | USBPHY_CTRL_ENUTMILEVEL3);
+
+ return 0;
+}
+
+static int
+imx6_usbphy_match(device_t parent, cfdata_t cf, void *aux)
+{
+ struct axi_attach_args *aa = aux;
+
+ switch (aa->aa_addr) {
+ case IMX6_AIPS1_BASE + AIPS1_USBPHY1_BASE:
+ case IMX6_AIPS1_BASE + AIPS1_USBPHY2_BASE:
+ return 1;
+ }
+
+ return 0;
+}
+
+
+static void
+imx6_usbphy_attach(device_t parent, device_t self, void *aux)
+{
+ struct imx6_usbphy_softc *sc = device_private(self);
+ struct axi_attach_args *aa = aux;
+ bus_addr_t addr = aa->aa_addr;
+ bus_size_t size = AIPS1_USBPHY_SIZE;
+ int error;
+
+ sc->sc_dev = self;
+ sc->sc_bst = aa->aa_iot;
+
+ error = bus_space_map(sc->sc_bst, addr, size, 0, &sc->sc_bsh);
+ if (error) {
+ aprint_error(": couldn't map %#llx: %d",
+ (uint64_t)addr, error);
+ return;
+ }
+
+ aprint_naive("\n");
+ aprint_normal(": USB PHY\n");
+
+ imx6_usbphy_enable(self, NULL, true);
+}
Index: src/sys/arch/arm/imx/imx6_usbphyreg.h
diff -u /dev/null src/sys/arch/arm/imx/imx6_usbphyreg.h:1.1
--- /dev/null Thu Nov 9 05:57:23 2017
+++ src/sys/arch/arm/imx/imx6_usbphyreg.h Thu Nov 9 05:57:23 2017
@@ -0,0 +1,64 @@
+/* $NetBSD: imx6_usbphyreg.h,v 1.1 2017/11/09 05:57:23 hkenken Exp $ */
+
+/*
+ * Copyright (c) 2017 Genetec Corporation. All rights reserved.
+ * Written by Hashimoto Kenichi for Genetec Corporation.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY GENETEC CORPORATION ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL GENETEC CORPORATION
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _ARM_IMX_IMX6_USBPHYREG_H
+#define _ARM_IMX_IMX6_USBPHYREG_H
+
+#include <sys/cdefs.h>
+
+#define USBPHY_PWD 0x00000000
+#define USBPHY_PWD_SET 0x00000004
+#define USBPHY_PWD_CLR 0x00000008
+#define USBPHY_PWD_TOG 0x0000000c
+#define USBPHY_TX 0x00000010
+#define USBPHY_TX_SET 0x00000014
+#define USBPHY_TX_CLR 0x00000018
+#define USBPHY_TX_TOG 0x0000001c
+#define USBPHY_TX_USBPHY_TX_EDGECTRL __BITS(28, 26)
+#define USBPHY_TX_TXCAL45DP __BITS(19, 16)
+#define USBPHY_TX_TXCAL45DN __BITS(11, 8)
+#define USBPHY_TX_D_CAL __BITS(3, 0)
+#define USBPHY_RX 0x00000020
+#define USBPHY_RX_SET 0x00000024
+#define USBPHY_RX_CLR 0x00000028
+#define USBPHY_RX_TOG 0x0000002c
+#define USBPHY_CTRL 0x00000030
+#define USBPHY_CTRL_SET 0x00000034
+#define USBPHY_CTRL_CLR 0x00000038
+#define USBPHY_CTRL_TOG 0x0000003c
+#define USBPHY_CTRL_SFTRST __BIT(31)
+#define USBPHY_CTRL_CLKGATE __BIT(30)
+#define USBPHY_CTRL_ENUTMILEVEL3 __BIT(15)
+#define USBPHY_CTRL_ENUTMILEVEL2 __BIT(14)
+#define USBPHY_STATUS 0x00000040
+#define USBPHY_DEBUG 0x00000050
+#define USBPHY_DEBUG0_STATUS 0x00000060
+#define USBPHY_DEBUG1 0x00000070
+#define USBPHY_VERSION 0x00000080
+
+#endif /* _ARM_IMX_IMX6_USBPHYREG_H */
