Module Name:    src
Committed By:   maxv
Date:           Tue Mar 13 16:45:52 UTC 2018

Modified Files:
        src/sys/arch/x86/x86: svs.c

Log Message:
Mmh, add a missing x86_disable_intr(). My intention there was to ensure
interrupts were disabled before the barriers.


To generate a diff of this commit:
cvs rdiff -u -r1.13 -r1.14 src/sys/arch/x86/x86/svs.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/x86/x86/svs.c
diff -u src/sys/arch/x86/x86/svs.c:1.13 src/sys/arch/x86/x86/svs.c:1.14
--- src/sys/arch/x86/x86/svs.c:1.13	Thu Mar  1 16:49:06 2018
+++ src/sys/arch/x86/x86/svs.c	Tue Mar 13 16:45:52 2018
@@ -1,4 +1,4 @@
-/*	$NetBSD: svs.c,v 1.13 2018/03/01 16:49:06 maxv Exp $	*/
+/*	$NetBSD: svs.c,v 1.14 2018/03/13 16:45:52 maxv Exp $	*/
 
 /*
  * Copyright (c) 2018 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: svs.c,v 1.13 2018/03/01 16:49:06 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: svs.c,v 1.14 2018/03/13 16:45:52 maxv Exp $");
 
 #include "opt_svs.h"
 
@@ -647,6 +647,7 @@ svs_disable_cpu(void *arg1, void *arg2)
 	u_long psl;
 
 	psl = x86_read_psl();
+	x86_disable_intr();
 
 	atomic_dec_ulong(&svs_cpu_barrier1);
 	while (atomic_cas_ulong(&svs_cpu_barrier1, 0, 0) != 0) {

Reply via email to