Module Name: src
Committed By: msaitoh
Date: Thu Mar 15 06:48:51 UTC 2018
Modified Files:
src/sys/dev/pci/ixgbe: if_bypass.c if_sriov.c ix_txrx.c ixgbe.c ixgbe.h
ixgbe_common.c ixgbe_common.h ixgbe_osdep.c ixgbe_osdep.h
ixgbe_phy.c ixgbe_sriov.h ixgbe_type.h ixgbe_vf.h ixgbe_x540.c
ixgbe_x550.c ixv.c
Log Message:
Add some changes from ix-3.2.17.tar.gz and r328265. Not fully synchronized.
Some others (e.g. sfp cage interrupt and bypass adapter stuff) will be merged
later:
- Initialize firmware command buffer correctly in ixgbe_read_ee_hostif_X550()
and ixgbe_read_ee_hostif_buffer_X550(). These functions are used when reading
NVM.
- Fix a bug that ixgbe_mng_present() misunderstand management capability on
X550 and newer on some environment. X550 changed FWSM bit definition.
See X540 document and X550's document and compare them.
- Fix checksum calculation in ixgbe_set_fw_drv_ver_generic(). This function is
not used in NetBSD.
- Add some unused funtions.
- Whitespace fix.
To generate a diff of this commit:
cvs rdiff -u -r1.2 -r1.3 src/sys/dev/pci/ixgbe/if_bypass.c \
src/sys/dev/pci/ixgbe/ixgbe_osdep.c
cvs rdiff -u -r1.1 -r1.2 src/sys/dev/pci/ixgbe/if_sriov.c \
src/sys/dev/pci/ixgbe/ixgbe_sriov.h
cvs rdiff -u -r1.35 -r1.36 src/sys/dev/pci/ixgbe/ix_txrx.c \
src/sys/dev/pci/ixgbe/ixgbe.h
cvs rdiff -u -r1.134 -r1.135 src/sys/dev/pci/ixgbe/ixgbe.c
cvs rdiff -u -r1.16 -r1.17 src/sys/dev/pci/ixgbe/ixgbe_common.c
cvs rdiff -u -r1.9 -r1.10 src/sys/dev/pci/ixgbe/ixgbe_common.h
cvs rdiff -u -r1.19 -r1.20 src/sys/dev/pci/ixgbe/ixgbe_osdep.h
cvs rdiff -u -r1.14 -r1.15 src/sys/dev/pci/ixgbe/ixgbe_phy.c
cvs rdiff -u -r1.31 -r1.32 src/sys/dev/pci/ixgbe/ixgbe_type.h
cvs rdiff -u -r1.11 -r1.12 src/sys/dev/pci/ixgbe/ixgbe_vf.h
cvs rdiff -u -r1.12 -r1.13 src/sys/dev/pci/ixgbe/ixgbe_x540.c
cvs rdiff -u -r1.7 -r1.8 src/sys/dev/pci/ixgbe/ixgbe_x550.c
cvs rdiff -u -r1.87 -r1.88 src/sys/dev/pci/ixgbe/ixv.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/dev/pci/ixgbe/if_bypass.c
diff -u src/sys/dev/pci/ixgbe/if_bypass.c:1.2 src/sys/dev/pci/ixgbe/if_bypass.c:1.3
--- src/sys/dev/pci/ixgbe/if_bypass.c:1.2 Wed Nov 22 15:15:09 2017
+++ src/sys/dev/pci/ixgbe/if_bypass.c Thu Mar 15 06:48:51 2018
@@ -474,45 +474,45 @@ ixgbe_bp_wd_set(SYSCTLFN_ARGS)
mask = BYPASS_WDT_ENABLE_M;
switch (timeout) {
- case 0: /* disables the timer */
- break;
- case 1:
- arg = BYPASS_WDT_1_5 << BYPASS_WDT_TIME_SHIFT;
- arg |= 0x1 << BYPASS_WDT_ENABLE_SHIFT;
- mask |= BYPASS_WDT_VALUE_M;
- break;
- case 2:
- arg = BYPASS_WDT_2 << BYPASS_WDT_TIME_SHIFT;
- arg |= 0x1 << BYPASS_WDT_ENABLE_SHIFT;
- mask |= BYPASS_WDT_VALUE_M;
- break;
- case 3:
- arg = BYPASS_WDT_3 << BYPASS_WDT_TIME_SHIFT;
- arg |= 0x1 << BYPASS_WDT_ENABLE_SHIFT;
- mask |= BYPASS_WDT_VALUE_M;
- break;
- case 4:
- arg = BYPASS_WDT_4 << BYPASS_WDT_TIME_SHIFT;
- arg |= 0x1 << BYPASS_WDT_ENABLE_SHIFT;
- mask |= BYPASS_WDT_VALUE_M;
- break;
- case 8:
- arg = BYPASS_WDT_8 << BYPASS_WDT_TIME_SHIFT;
- arg |= 0x1 << BYPASS_WDT_ENABLE_SHIFT;
- mask |= BYPASS_WDT_VALUE_M;
- break;
- case 16:
- arg = BYPASS_WDT_16 << BYPASS_WDT_TIME_SHIFT;
- arg |= 0x1 << BYPASS_WDT_ENABLE_SHIFT;
- mask |= BYPASS_WDT_VALUE_M;
- break;
- case 32:
- arg = BYPASS_WDT_32 << BYPASS_WDT_TIME_SHIFT;
- arg |= 0x1 << BYPASS_WDT_ENABLE_SHIFT;
- mask |= BYPASS_WDT_VALUE_M;
- break;
- default:
- return (EINVAL);
+ case 0: /* disables the timer */
+ break;
+ case 1:
+ arg = BYPASS_WDT_1_5 << BYPASS_WDT_TIME_SHIFT;
+ arg |= 0x1 << BYPASS_WDT_ENABLE_SHIFT;
+ mask |= BYPASS_WDT_VALUE_M;
+ break;
+ case 2:
+ arg = BYPASS_WDT_2 << BYPASS_WDT_TIME_SHIFT;
+ arg |= 0x1 << BYPASS_WDT_ENABLE_SHIFT;
+ mask |= BYPASS_WDT_VALUE_M;
+ break;
+ case 3:
+ arg = BYPASS_WDT_3 << BYPASS_WDT_TIME_SHIFT;
+ arg |= 0x1 << BYPASS_WDT_ENABLE_SHIFT;
+ mask |= BYPASS_WDT_VALUE_M;
+ break;
+ case 4:
+ arg = BYPASS_WDT_4 << BYPASS_WDT_TIME_SHIFT;
+ arg |= 0x1 << BYPASS_WDT_ENABLE_SHIFT;
+ mask |= BYPASS_WDT_VALUE_M;
+ break;
+ case 8:
+ arg = BYPASS_WDT_8 << BYPASS_WDT_TIME_SHIFT;
+ arg |= 0x1 << BYPASS_WDT_ENABLE_SHIFT;
+ mask |= BYPASS_WDT_VALUE_M;
+ break;
+ case 16:
+ arg = BYPASS_WDT_16 << BYPASS_WDT_TIME_SHIFT;
+ arg |= 0x1 << BYPASS_WDT_ENABLE_SHIFT;
+ mask |= BYPASS_WDT_VALUE_M;
+ break;
+ case 32:
+ arg = BYPASS_WDT_32 << BYPASS_WDT_TIME_SHIFT;
+ arg |= 0x1 << BYPASS_WDT_ENABLE_SHIFT;
+ mask |= BYPASS_WDT_VALUE_M;
+ break;
+ default:
+ return (EINVAL);
}
/* Set the new watchdog */
ixgbe_bypass_mutex_enter(adapter);
@@ -635,7 +635,7 @@ ixgbe_bp_log(SYSCTLFN_ARGS)
&data);
ixgbe_bypass_mutex_clear(adapter);
if (error)
- return (-EINVAL);
+ return (EINVAL);
eeprom[count].logs += data << (8 * i);
}
@@ -644,7 +644,7 @@ ixgbe_bp_log(SYSCTLFN_ARGS)
log_off + i, &eeprom[count].actions);
ixgbe_bypass_mutex_clear(adapter);
if (error)
- return (-EINVAL);
+ return (EINVAL);
/* Quit if not a unread log */
if (!(eeprom[count].logs & BYPASS_LOG_CLEAR_M))
@@ -717,7 +717,7 @@ ixgbe_bp_log(SYSCTLFN_ARGS)
ixgbe_bypass_mutex_clear(adapter);
if (error)
- return (-EINVAL);
+ return (EINVAL);
}
status = 0; /* reset */
@@ -731,7 +731,7 @@ unlock_err:
status = 0; /* reset */
while (atomic_cas_uint(&adapter->bypass.log, 1, 0) == 0)
usec_delay(3000);
- return (-EINVAL);
+ return (EINVAL);
} /* ixgbe_bp_log */
/************************************************************************
Index: src/sys/dev/pci/ixgbe/ixgbe_osdep.c
diff -u src/sys/dev/pci/ixgbe/ixgbe_osdep.c:1.2 src/sys/dev/pci/ixgbe/ixgbe_osdep.c:1.3
--- src/sys/dev/pci/ixgbe/ixgbe_osdep.c:1.2 Wed Aug 30 08:49:18 2017
+++ src/sys/dev/pci/ixgbe/ixgbe_osdep.c Thu Mar 15 06:48:51 2018
@@ -1,33 +1,33 @@
-/* $NetBSD: ixgbe_osdep.c,v 1.2 2017/08/30 08:49:18 msaitoh Exp $ */
+/* $NetBSD: ixgbe_osdep.c,v 1.3 2018/03/15 06:48:51 msaitoh Exp $ */
/******************************************************************************
- Copyright (c) 2001-2017, Intel Corporation
+ Copyright (c) 2001-2017, Intel Corporation
All rights reserved.
-
- Redistribution and use in source and binary forms, with or without
+
+ Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
-
- 1. Redistributions of source code must retain the above copyright notice,
+
+ 1. Redistributions of source code must retain the above copyright notice,
this list of conditions and the following disclaimer.
-
- 2. Redistributions in binary form must reproduce the above copyright
- notice, this list of conditions and the following disclaimer in the
+
+ 2. Redistributions in binary form must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution.
-
- 3. Neither the name of the Intel Corporation nor the names of its
- contributors may be used to endorse or promote products derived from
+
+ 3. Neither the name of the Intel Corporation nor the names of its
+ contributors may be used to endorse or promote products derived from
this software without specific prior written permission.
-
+
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
- LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE.
Index: src/sys/dev/pci/ixgbe/if_sriov.c
diff -u src/sys/dev/pci/ixgbe/if_sriov.c:1.1 src/sys/dev/pci/ixgbe/if_sriov.c:1.2
--- src/sys/dev/pci/ixgbe/if_sriov.c:1.1 Wed Aug 30 08:49:18 2017
+++ src/sys/dev/pci/ixgbe/if_sriov.c Thu Mar 15 06:48:51 2018
@@ -33,6 +33,7 @@
/*$FreeBSD: head/sys/dev/ixgbe/if_sriov.c 320688 2017-07-05 17:27:03Z erj $*/
#include "ixgbe.h"
+#include "ixgbe_sriov.h"
#ifdef PCI_IOV
@@ -89,26 +90,26 @@ ixgbe_align_all_queue_indices(struct ada
/* Support functions for SR-IOV/VF management */
static inline void
-ixgbe_send_vf_msg(struct adapter *adapter, struct ixgbe_vf *vf, u32 msg)
+ixgbe_send_vf_msg(struct ixgbe_hw *hw, struct ixgbe_vf *vf, u32 msg)
{
if (vf->flags & IXGBE_VF_CTS)
msg |= IXGBE_VT_MSGTYPE_CTS;
- adapter->hw.mbx.ops.write(&adapter->hw, &msg, 1, vf->pool);
+ hw->mbx.ops.write(hw, &msg, 1, vf->pool);
}
static inline void
ixgbe_send_vf_ack(struct adapter *adapter, struct ixgbe_vf *vf, u32 msg)
{
msg &= IXGBE_VT_MSG_MASK;
- ixgbe_send_vf_msg(adapter, vf, msg | IXGBE_VT_MSGTYPE_ACK);
+ ixgbe_send_vf_msg(&adapter->hw, vf, msg | IXGBE_VT_MSGTYPE_ACK);
}
static inline void
ixgbe_send_vf_nack(struct adapter *adapter, struct ixgbe_vf *vf, u32 msg)
{
msg &= IXGBE_VT_MSG_MASK;
- ixgbe_send_vf_msg(adapter, vf, msg | IXGBE_VT_MSGTYPE_NACK);
+ ixgbe_send_vf_msg(&adapter->hw, vf, msg | IXGBE_VT_MSGTYPE_NACK);
}
static inline void
@@ -204,7 +205,7 @@ ixgbe_ping_all_vfs(struct adapter *adapt
for (int i = 0; i < adapter->num_vfs; i++) {
vf = &adapter->vfs[i];
if (vf->flags & IXGBE_VF_ACTIVE)
- ixgbe_send_vf_msg(adapter, vf, IXGBE_PF_CONTROL_MSG);
+ ixgbe_send_vf_msg(&adapter->hw, vf, IXGBE_PF_CONTROL_MSG);
}
} /* ixgbe_ping_all_vfs */
@@ -233,7 +234,7 @@ ixgbe_vf_set_default_vlan(struct adapter
if (tag == 0) {
/* Accept non-vlan tagged traffic. */
- //vmolr |= IXGBE_VMOLR_AUPE;
+ vmolr |= IXGBE_VMOLR_AUPE;
/* Allow VM to tag outgoing traffic; no default tag. */
vmvir = 0;
@@ -292,7 +293,6 @@ ixgbe_vf_frame_size_compatible(struct ad
return (TRUE);
return (FALSE);
-
}
} /* ixgbe_vf_frame_size_compatible */
@@ -366,7 +366,7 @@ ixgbe_vf_reset_msg(struct adapter *adapt
vf->flags |= IXGBE_VF_CTS;
- resp[0] = IXGBE_VF_RESET | ack | IXGBE_VT_MSGTYPE_CTS;
+ resp[0] = IXGBE_VF_RESET | ack;
bcopy(vf->ether_addr, &resp[1], ETHER_ADDR_LEN);
resp[3] = hw->mac.mc_filter_type;
hw->mbx.ops.write(hw, resp, IXGBE_VF_PERMADDR_MSG_LEN, vf->pool);
@@ -451,7 +451,7 @@ ixgbe_vf_set_vlan(struct adapter *adapte
}
/* It is illegal to enable vlan tag 0. */
- if (tag == 0 && enable != 0){
+ if (tag == 0 && enable != 0) {
ixgbe_send_vf_nack(adapter, vf, msg[0]);
return;
}
@@ -578,8 +578,8 @@ ixgbe_process_vf_msg(struct adapter *ada
if (error != 0)
return;
- CTR3(KTR_MALLOC, "%s: received msg %x from %d",
- adapter->ifp->if_xname, msg[0], vf->pool);
+ CTR3(KTR_MALLOC, "%s: received msg %x from %d", adapter->ifp->if_xname,
+ msg[0], vf->pool);
if (msg[0] == IXGBE_VF_RESET) {
ixgbe_vf_reset_msg(adapter, vf, msg);
return;
@@ -622,12 +622,11 @@ ixgbe_process_vf_msg(struct adapter *ada
void
ixgbe_handle_mbx(void *context, int pending)
{
- struct adapter *adapter;
+ struct adapter *adapter = context;
struct ixgbe_hw *hw;
struct ixgbe_vf *vf;
int i;
- adapter = context;
hw = &adapter->hw;
IXGBE_CORE_LOCK(adapter);
@@ -694,19 +693,22 @@ ixgbe_init_iov(device_t dev, u16 num_vfs
}
adapter->num_vfs = num_vfs;
- adapter->init_locked(adapter);
+
+ /* set the SRIOV flag now as it's needed
+ * by ixgbe_init_locked() */
adapter->feat_en |= IXGBE_FEATURE_SRIOV;
+ adapter->init_locked(adapter);
IXGBE_CORE_UNLOCK(adapter);
- return retval;
+ return (retval);
err_init_iov:
adapter->num_vfs = 0;
adapter->pool = 0;
adapter->iov_mode = IXGBE_NO_VM;
- return retval;
+ return (retval);
} /* ixgbe_init_iov */
void
@@ -773,7 +775,7 @@ ixgbe_init_vf(struct adapter *adapter, s
ixgbe_vf_enable_transmit(adapter, vf);
ixgbe_vf_enable_receive(adapter, vf);
- ixgbe_send_vf_msg(adapter, vf, IXGBE_PF_CONTROL_MSG);
+ ixgbe_send_vf_msg(&adapter->hw, vf, IXGBE_PF_CONTROL_MSG);
} /* ixgbe_init_vf */
void
Index: src/sys/dev/pci/ixgbe/ixgbe_sriov.h
diff -u src/sys/dev/pci/ixgbe/ixgbe_sriov.h:1.1 src/sys/dev/pci/ixgbe/ixgbe_sriov.h:1.2
--- src/sys/dev/pci/ixgbe/ixgbe_sriov.h:1.1 Wed Aug 30 08:49:18 2017
+++ src/sys/dev/pci/ixgbe/ixgbe_sriov.h Thu Mar 15 06:48:51 2018
@@ -75,6 +75,7 @@ void ixgbe_ping_all_vfs(struct adapter *
int ixgbe_pci_iov_detach(device_t);
void ixgbe_define_iov_schemas(device_t, int *);
void ixgbe_align_all_queue_indices(struct adapter *);
+int ixgbe_vf_que_index(int, int, int);
u32 ixgbe_get_mtqc(int);
u32 ixgbe_get_mrqc(int);
@@ -91,12 +92,12 @@ u32 ixgbe_get_mrqc(int);
#define ixgbe_pci_iov_detach(_a) 0
#define ixgbe_define_iov_schemas(_a,_b) do { } while (/*CONSTCOND*/false)
#define ixgbe_align_all_queue_indices(_a) do { } while (/*CONSTCOND*/false)
+#define ixgbe_vf_que_index(_a, _b, _c) (_c)
#define ixgbe_get_mtqc(_a) IXGBE_MTQC_64Q_1PB
#define ixgbe_get_mrqc(_a) 0
#endif /* PCI_IOV */
void ixgbe_handle_mbx(void *);
-int ixgbe_vf_que_index(int, int, int);
#endif
Index: src/sys/dev/pci/ixgbe/ix_txrx.c
diff -u src/sys/dev/pci/ixgbe/ix_txrx.c:1.35 src/sys/dev/pci/ixgbe/ix_txrx.c:1.36
--- src/sys/dev/pci/ixgbe/ix_txrx.c:1.35 Fri Mar 9 06:27:53 2018
+++ src/sys/dev/pci/ixgbe/ix_txrx.c Thu Mar 15 06:48:51 2018
@@ -1,4 +1,4 @@
-/* $NetBSD: ix_txrx.c,v 1.35 2018/03/09 06:27:53 msaitoh Exp $ */
+/* $NetBSD: ix_txrx.c,v 1.36 2018/03/15 06:48:51 msaitoh Exp $ */
/******************************************************************************
@@ -865,23 +865,23 @@ ixgbe_tx_ctx_setup(struct tx_ring *txr,
/* No support for offloads for non-L4 next headers */
switch (ipproto) {
- case IPPROTO_TCP:
- if (mp->m_pkthdr.csum_flags &
- (M_CSUM_TCPv4 | M_CSUM_TCPv6))
- type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_L4T_TCP;
- else
- offload = false;
- break;
- case IPPROTO_UDP:
- if (mp->m_pkthdr.csum_flags &
- (M_CSUM_UDPv4 | M_CSUM_UDPv6))
- type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_L4T_UDP;
- else
- offload = false;
- break;
- default:
+ case IPPROTO_TCP:
+ if (mp->m_pkthdr.csum_flags &
+ (M_CSUM_TCPv4 | M_CSUM_TCPv6))
+ type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_L4T_TCP;
+ else
offload = false;
- break;
+ break;
+ case IPPROTO_UDP:
+ if (mp->m_pkthdr.csum_flags &
+ (M_CSUM_UDPv4 | M_CSUM_UDPv6))
+ type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_L4T_UDP;
+ else
+ offload = false;
+ break;
+ default:
+ offload = false;
+ break;
}
if (offload) /* Insert L4 checksum into data descriptors */
Index: src/sys/dev/pci/ixgbe/ixgbe.h
diff -u src/sys/dev/pci/ixgbe/ixgbe.h:1.35 src/sys/dev/pci/ixgbe/ixgbe.h:1.36
--- src/sys/dev/pci/ixgbe/ixgbe.h:1.35 Fri Mar 9 06:27:53 2018
+++ src/sys/dev/pci/ixgbe/ixgbe.h Thu Mar 15 06:48:51 2018
@@ -1,4 +1,4 @@
-/* $NetBSD: ixgbe.h,v 1.35 2018/03/09 06:27:53 msaitoh Exp $ */
+/* $NetBSD: ixgbe.h,v 1.36 2018/03/15 06:48:51 msaitoh Exp $ */
/******************************************************************************
SPDX-License-Identifier: BSD-3-Clause
@@ -114,7 +114,6 @@
#include "ixgbe_netbsd.h"
#include "ixgbe_api.h"
#include "ixgbe_common.h"
-#include "ixgbe_phy.h"
#include "ixgbe_vf.h"
#include "ixgbe_features.h"
@@ -256,7 +255,6 @@
IXGBE_EITR_ITR_INT_MASK)
-
/************************************************************************
* vendor_info_array
*
@@ -605,7 +603,6 @@ struct adapter {
ixgbe_extmem_head_t jcl_head;
};
-
/* Precision Time Sync (IEEE 1588) defines */
#define ETHERTYPE_IEEE1588 0x88F7
#define PICOSECS_PER_TICK 20833
@@ -681,10 +678,10 @@ static __inline int
drbr_needs_enqueue(struct ifnet *ifp, struct buf_ring *br)
{
#ifdef ALTQ
- if (ALTQ_IS_ENABLED(&ifp->if_snd))
- return (1);
+ if (ALTQ_IS_ENABLED(&ifp->if_snd))
+ return (1);
#endif
- return (!buf_ring_empty(br));
+ return (!buf_ring_empty(br));
}
#endif
@@ -752,7 +749,6 @@ bool ixgbe_rxeof(struct ix_queue *);
const struct sysctlnode *ixgbe_sysctl_instance(struct adapter *);
#include "ixgbe_bypass.h"
-#include "ixgbe_sriov.h"
#include "ixgbe_fdir.h"
#include "ixgbe_rss.h"
#include "ixgbe_netmap.h"
Index: src/sys/dev/pci/ixgbe/ixgbe.c
diff -u src/sys/dev/pci/ixgbe/ixgbe.c:1.134 src/sys/dev/pci/ixgbe/ixgbe.c:1.135
--- src/sys/dev/pci/ixgbe/ixgbe.c:1.134 Fri Mar 9 06:27:53 2018
+++ src/sys/dev/pci/ixgbe/ixgbe.c Thu Mar 15 06:48:51 2018
@@ -1,4 +1,4 @@
-/* $NetBSD: ixgbe.c,v 1.134 2018/03/09 06:27:53 msaitoh Exp $ */
+/* $NetBSD: ixgbe.c,v 1.135 2018/03/15 06:48:51 msaitoh Exp $ */
/******************************************************************************
@@ -70,6 +70,7 @@
#endif
#include "ixgbe.h"
+#include "ixgbe_sriov.h"
#include "vlan.h"
#include <sys/cprng.h>
@@ -1708,6 +1709,10 @@ ixgbe_add_hw_stats(struct adapter *adapt
NULL, xname, "Link MSI-X IRQ Handled");
for (int i = 0; i < adapter->num_queues; i++, rxr++, txr++) {
+#ifdef LRO
+ struct lro_ctrl *lro = &rxr->lro;
+#endif /* LRO */
+
snprintf(adapter->queues[i].evnamebuf,
sizeof(adapter->queues[i].evnamebuf), "%s q%d",
xname, i);
@@ -1767,10 +1772,6 @@ ixgbe_add_hw_stats(struct adapter *adapt
"Packets dropped in pcq");
#endif
-#ifdef LRO
- struct lro_ctrl *lro = &rxr->lro;
-#endif /* LRO */
-
if (sysctl_createv(log, 0, &rnode, &cnode,
CTLFLAG_READONLY,
CTLTYPE_INT,
@@ -3931,7 +3932,6 @@ ixgbe_set_ivar(struct adapter *adapter,
vector |= IXGBE_IVAR_ALLOC_VAL;
switch (hw->mac.type) {
-
case ixgbe_mac_82598EB:
if (type == -1)
entry = IXGBE_IVAR_OTHER_CAUSES_INDEX;
@@ -3943,7 +3943,6 @@ ixgbe_set_ivar(struct adapter *adapter,
ivar |= (vector << (8 * (entry & 0x3)));
IXGBE_WRITE_REG(&adapter->hw, IXGBE_IVAR(index), ivar);
break;
-
case ixgbe_mac_82599EB:
case ixgbe_mac_X540:
case ixgbe_mac_X550:
@@ -3962,7 +3961,7 @@ ixgbe_set_ivar(struct adapter *adapter,
ivar |= (vector << index);
IXGBE_WRITE_REG(hw, IXGBE_IVAR(entry >> 1), ivar);
}
-
+ break;
default:
break;
}
@@ -4045,7 +4044,6 @@ ixgbe_config_gpie(struct adapter *adapte
IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie);
- return;
} /* ixgbe_config_gpie */
/************************************************************************
@@ -4152,7 +4150,6 @@ ixgbe_set_multi(struct adapter *adapter)
ixgbe_mc_array_itr, TRUE);
}
- return;
} /* ixgbe_set_multi */
/************************************************************************
@@ -4550,8 +4547,6 @@ ixgbe_update_link_status(struct adapter
ixgbe_ping_all_vfs(adapter);
}
}
-
- return;
} /* ixgbe_update_link_status */
/************************************************************************
@@ -4684,7 +4679,6 @@ ixgbe_disable_intr(struct adapter *adapt
IXGBE_WRITE_FLUSH(&adapter->hw);
- return;
} /* ixgbe_disable_intr */
/************************************************************************
@@ -5204,7 +5198,7 @@ ixgbe_sysctl_dmac(SYSCTLFN_ARGS)
/* Re-initialize hardware if it's already running */
if (ifp->if_flags & IFF_RUNNING)
- ixgbe_init(ifp);
+ ifp->if_init(ifp);
return (0);
}
@@ -5514,7 +5508,7 @@ ixgbe_sysctl_eee_state(SYSCTLFN_ARGS)
}
/* Restart auto-neg */
- ixgbe_init(ifp);
+ ifp->if_init(ifp);
device_printf(dev, "New EEE state: %d\n", new_eee);
@@ -5822,7 +5816,8 @@ ixgbe_ioctl(struct ifnet * ifp, u_long c
;
else if (command == SIOCSIFCAP || command == SIOCSIFMTU) {
IXGBE_CORE_LOCK(adapter);
- ixgbe_init_locked(adapter);
+ if ((ifp->if_flags & IFF_RUNNING) != 0)
+ ixgbe_init_locked(adapter);
ixgbe_recalculate_max_frame(adapter);
IXGBE_CORE_UNLOCK(adapter);
} else if (command == SIOCADDMULTI || command == SIOCDELMULTI) {
Index: src/sys/dev/pci/ixgbe/ixgbe_common.c
diff -u src/sys/dev/pci/ixgbe/ixgbe_common.c:1.16 src/sys/dev/pci/ixgbe/ixgbe_common.c:1.17
--- src/sys/dev/pci/ixgbe/ixgbe_common.c:1.16 Wed Dec 6 04:08:50 2017
+++ src/sys/dev/pci/ixgbe/ixgbe_common.c Thu Mar 15 06:48:51 2018
@@ -1,4 +1,4 @@
-/* $NetBSD: ixgbe_common.c,v 1.16 2017/12/06 04:08:50 msaitoh Exp $ */
+/* $NetBSD: ixgbe_common.c,v 1.17 2018/03/15 06:48:51 msaitoh Exp $ */
/******************************************************************************
SPDX-License-Identifier: BSD-3-Clause
@@ -225,6 +225,7 @@ bool ixgbe_device_supports_autoneg_fc(st
ERROR_REPORT2(IXGBE_ERROR_UNSUPPORTED,
"Device %x does not support flow control autoneg",
hw->device_id);
+
return supported;
}
@@ -3357,7 +3358,7 @@ void ixgbe_release_swfw_sync(struct ixgb
**/
s32 ixgbe_disable_sec_rx_path_generic(struct ixgbe_hw *hw)
{
-#define IXGBE_MAX_SECRX_POLL 40
+#define IXGBE_MAX_SECRX_POLL 4000
int i;
int secrxreg;
@@ -3374,7 +3375,7 @@ s32 ixgbe_disable_sec_rx_path_generic(st
break;
else
/* Use interrupt-safe sleep just in case */
- usec_delay(1000);
+ usec_delay(10);
}
/* For informational purposes only */
@@ -3522,7 +3523,6 @@ s32 ixgbe_blink_led_stop_generic(struct
if (index > 3)
return IXGBE_ERR_PARAM;
-
ret_val = hw->mac.ops.prot_autoc_read(hw, &locked, &autoc_reg);
if (ret_val != IXGBE_SUCCESS)
goto out;
@@ -4130,7 +4130,7 @@ s32 ixgbe_clear_vfta_generic(struct ixgb
for (offset = 0; offset < IXGBE_VLVF_ENTRIES; offset++) {
IXGBE_WRITE_REG(hw, IXGBE_VLVF(offset), 0);
IXGBE_WRITE_REG(hw, IXGBE_VLVFB(offset * 2), 0);
- IXGBE_WRITE_REG(hw, IXGBE_VLVFB(offset * 2 + 1), 0);
+ IXGBE_WRITE_REG(hw, IXGBE_VLVFB((offset * 2) + 1), 0);
}
return IXGBE_SUCCESS;
@@ -4257,9 +4257,8 @@ s32 ixgbe_check_mac_link_generic(struct
case IXGBE_LINKS_SPEED_10_X550EM_A:
*speed = IXGBE_LINK_SPEED_UNKNOWN;
if (hw->device_id == IXGBE_DEV_ID_X550EM_A_1G_T ||
- hw->device_id == IXGBE_DEV_ID_X550EM_A_1G_T_L) {
+ hw->device_id == IXGBE_DEV_ID_X550EM_A_1G_T_L)
*speed = IXGBE_LINK_SPEED_10_FULL;
- }
break;
default:
*speed = IXGBE_LINK_SPEED_UNKNOWN;
@@ -4679,10 +4678,10 @@ s32 ixgbe_set_fw_drv_ver_generic(struct
fw_cmd.ver_build = build;
fw_cmd.ver_sub = sub;
fw_cmd.hdr.checksum = 0;
- fw_cmd.hdr.checksum = ixgbe_calculate_checksum((u8 *)&fw_cmd,
- (FW_CEM_HDR_LEN + fw_cmd.hdr.buf_len));
fw_cmd.pad = 0;
fw_cmd.pad2 = 0;
+ fw_cmd.hdr.checksum = ixgbe_calculate_checksum((u8 *)&fw_cmd,
+ (FW_CEM_HDR_LEN + fw_cmd.hdr.buf_len));
for (i = 0; i <= FW_CEM_MAX_RETRIES; i++) {
ret_val = ixgbe_host_interface_command(hw, (u32 *)&fw_cmd,
@@ -5071,6 +5070,117 @@ s32 ixgbe_bypass_rd_eep_generic(struct i
return IXGBE_SUCCESS;
}
+/**
+ * ixgbe_get_orom_version - Return option ROM from EEPROM
+ *
+ * @hw: pointer to hardware structure
+ * @nvm_ver: pointer to output structure
+ *
+ * if valid option ROM version, nvm_ver->or_valid set to TRUE
+ * else nvm_ver->or_valid is FALSE.
+ **/
+void ixgbe_get_orom_version(struct ixgbe_hw *hw,
+ struct ixgbe_nvm_version *nvm_ver)
+{
+ u16 offset, eeprom_cfg_blkh, eeprom_cfg_blkl;
+
+ nvm_ver->or_valid = FALSE;
+ /* Option Rom may or may not be present. Start with pointer */
+ hw->eeprom.ops.read(hw, NVM_OROM_OFFSET, &offset);
+
+ /* make sure offset is valid */
+ if ((offset == 0x0) || (offset == NVM_INVALID_PTR))
+ return;
+
+ hw->eeprom.ops.read(hw, offset + NVM_OROM_BLK_HI, &eeprom_cfg_blkh);
+ hw->eeprom.ops.read(hw, offset + NVM_OROM_BLK_LOW, &eeprom_cfg_blkl);
+
+ /* option rom exists and is valid */
+ if ((eeprom_cfg_blkl | eeprom_cfg_blkh) == 0x0 ||
+ eeprom_cfg_blkl == NVM_VER_INVALID ||
+ eeprom_cfg_blkh == NVM_VER_INVALID)
+ return;
+
+ nvm_ver->or_valid = TRUE;
+ nvm_ver->or_major = eeprom_cfg_blkl >> NVM_OROM_SHIFT;
+ nvm_ver->or_build = (eeprom_cfg_blkl << NVM_OROM_SHIFT) |
+ (eeprom_cfg_blkh >> NVM_OROM_SHIFT);
+ nvm_ver->or_patch = eeprom_cfg_blkh & NVM_OROM_PATCH_MASK;
+}
+
+/**
+ * ixgbe_get_oem_prod_version - Return OEM Product version
+ *
+ * @hw: pointer to hardware structure
+ * @nvm_ver: pointer to output structure
+ *
+ * if valid OEM product version, nvm_ver->oem_valid set to TRUE
+ * else nvm_ver->oem_valid is FALSE.
+ **/
+void ixgbe_get_oem_prod_version(struct ixgbe_hw *hw,
+ struct ixgbe_nvm_version *nvm_ver)
+{
+ u16 rel_num, prod_ver, mod_len, cap, offset;
+
+ nvm_ver->oem_valid = FALSE;
+ hw->eeprom.ops.read(hw, NVM_OEM_PROD_VER_PTR, &offset);
+
+ /* Return is offset to OEM Product Version block is invalid */
+ if (offset == 0x0 && offset == NVM_INVALID_PTR)
+ return;
+
+ /* Read product version block */
+ hw->eeprom.ops.read(hw, offset, &mod_len);
+ hw->eeprom.ops.read(hw, offset + NVM_OEM_PROD_VER_CAP_OFF, &cap);
+
+ /* Return if OEM product version block is invalid */
+ if (mod_len != NVM_OEM_PROD_VER_MOD_LEN ||
+ (cap & NVM_OEM_PROD_VER_CAP_MASK) != 0x0)
+ return;
+
+ hw->eeprom.ops.read(hw, offset + NVM_OEM_PROD_VER_OFF_L, &prod_ver);
+ hw->eeprom.ops.read(hw, offset + NVM_OEM_PROD_VER_OFF_H, &rel_num);
+
+ /* Return if version is invalid */
+ if ((rel_num | prod_ver) == 0x0 ||
+ rel_num == NVM_VER_INVALID || prod_ver == NVM_VER_INVALID)
+ return;
+
+ nvm_ver->oem_major = prod_ver >> NVM_VER_SHIFT;
+ nvm_ver->oem_minor = prod_ver & NVM_VER_MASK;
+ nvm_ver->oem_release = rel_num;
+ nvm_ver->oem_valid = TRUE;
+}
+
+/**
+ * ixgbe_get_etk_id - Return Etrack ID from EEPROM
+ *
+ * @hw: pointer to hardware structure
+ * @nvm_ver: pointer to output structure
+ *
+ * word read errors will return 0xFFFF
+ **/
+void ixgbe_get_etk_id(struct ixgbe_hw *hw, struct ixgbe_nvm_version *nvm_ver)
+{
+ u16 etk_id_l, etk_id_h;
+
+ if (hw->eeprom.ops.read(hw, NVM_ETK_OFF_LOW, &etk_id_l))
+ etk_id_l = NVM_VER_INVALID;
+ if (hw->eeprom.ops.read(hw, NVM_ETK_OFF_HI, &etk_id_h))
+ etk_id_h = NVM_VER_INVALID;
+
+ /* The word order for the version format is determined by high order
+ * word bit 15.
+ */
+ if ((etk_id_h & NVM_ETK_VALID) == 0) {
+ nvm_ver->etk_id = etk_id_h;
+ nvm_ver->etk_id |= (etk_id_l << NVM_ETK_SHIFT);
+ } else {
+ nvm_ver->etk_id = etk_id_l;
+ nvm_ver->etk_id |= (etk_id_h << NVM_ETK_SHIFT);
+ }
+}
+
/**
* ixgbe_dcb_get_rtrup2tc_generic - read rtrup2tc reg
@@ -5142,8 +5252,7 @@ bool ixgbe_mng_present(struct ixgbe_hw *
return FALSE;
fwsm = IXGBE_READ_REG(hw, IXGBE_FWSM_BY_MAC(hw));
- fwsm &= IXGBE_FWSM_MODE_MASK;
- return fwsm == IXGBE_FWSM_FW_MODE_PT;
+ return !!(fwsm & IXGBE_FWSM_FW_MODE_PT);
}
/**
Index: src/sys/dev/pci/ixgbe/ixgbe_common.h
diff -u src/sys/dev/pci/ixgbe/ixgbe_common.h:1.9 src/sys/dev/pci/ixgbe/ixgbe_common.h:1.10
--- src/sys/dev/pci/ixgbe/ixgbe_common.h:1.9 Wed Dec 6 04:08:50 2017
+++ src/sys/dev/pci/ixgbe/ixgbe_common.h Thu Mar 15 06:48:51 2018
@@ -1,4 +1,4 @@
-/* $NetBSD: ixgbe_common.h,v 1.9 2017/12/06 04:08:50 msaitoh Exp $ */
+/* $NetBSD: ixgbe_common.h,v 1.10 2018/03/15 06:48:51 msaitoh Exp $ */
/******************************************************************************
SPDX-License-Identifier: BSD-3-Clause
@@ -182,6 +182,11 @@ extern void ixgbe_stop_mac_link_on_d3_82
bool ixgbe_mng_present(struct ixgbe_hw *hw);
bool ixgbe_mng_enabled(struct ixgbe_hw *hw);
+void ixgbe_get_etk_id(struct ixgbe_hw *hw, struct ixgbe_nvm_version *nvm_ver);
+void ixgbe_get_oem_prod_version(struct ixgbe_hw *hw,
+ struct ixgbe_nvm_version *nvm_ver);
+void ixgbe_get_orom_version(struct ixgbe_hw *hw,
+ struct ixgbe_nvm_version *nvm_ver);
void ixgbe_disable_rx_generic(struct ixgbe_hw *hw);
void ixgbe_enable_rx_generic(struct ixgbe_hw *hw);
s32 ixgbe_setup_mac_link_multispeed_fiber(struct ixgbe_hw *hw,
Index: src/sys/dev/pci/ixgbe/ixgbe_osdep.h
diff -u src/sys/dev/pci/ixgbe/ixgbe_osdep.h:1.19 src/sys/dev/pci/ixgbe/ixgbe_osdep.h:1.20
--- src/sys/dev/pci/ixgbe/ixgbe_osdep.h:1.19 Wed Dec 6 04:08:50 2017
+++ src/sys/dev/pci/ixgbe/ixgbe_osdep.h Thu Mar 15 06:48:51 2018
@@ -1,34 +1,34 @@
-/* $NetBSD: ixgbe_osdep.h,v 1.19 2017/12/06 04:08:50 msaitoh Exp $ */
+/* $NetBSD: ixgbe_osdep.h,v 1.20 2018/03/15 06:48:51 msaitoh Exp $ */
/******************************************************************************
SPDX-License-Identifier: BSD-3-Clause
- Copyright (c) 2001-2017, Intel Corporation
+ Copyright (c) 2001-2017, Intel Corporation
All rights reserved.
-
- Redistribution and use in source and binary forms, with or without
+
+ Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
-
- 1. Redistributions of source code must retain the above copyright notice,
+
+ 1. Redistributions of source code must retain the above copyright notice,
this list of conditions and the following disclaimer.
-
- 2. Redistributions in binary form must reproduce the above copyright
- notice, this list of conditions and the following disclaimer in the
+
+ 2. Redistributions in binary form must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution.
-
- 3. Neither the name of the Intel Corporation nor the names of its
- contributors may be used to endorse or promote products derived from
+
+ 3. Neither the name of the Intel Corporation nor the names of its
+ contributors may be used to endorse or promote products derived from
this software without specific prior written permission.
-
+
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
- LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE.
Index: src/sys/dev/pci/ixgbe/ixgbe_phy.c
diff -u src/sys/dev/pci/ixgbe/ixgbe_phy.c:1.14 src/sys/dev/pci/ixgbe/ixgbe_phy.c:1.15
--- src/sys/dev/pci/ixgbe/ixgbe_phy.c:1.14 Wed Dec 6 04:08:50 2017
+++ src/sys/dev/pci/ixgbe/ixgbe_phy.c Thu Mar 15 06:48:51 2018
@@ -1,4 +1,4 @@
-/* $NetBSD: ixgbe_phy.c,v 1.14 2017/12/06 04:08:50 msaitoh Exp $ */
+/* $NetBSD: ixgbe_phy.c,v 1.15 2018/03/15 06:48:51 msaitoh Exp $ */
/******************************************************************************
SPDX-License-Identifier: BSD-3-Clause
@@ -1516,21 +1516,18 @@ s32 ixgbe_identify_sfp_module_generic(st
hw->phy.type = ixgbe_phy_sfp_intel;
break;
default:
- if (cable_tech & IXGBE_SFF_DA_PASSIVE_CABLE)
- hw->phy.type =
- ixgbe_phy_sfp_passive_unknown;
- else if (cable_tech & IXGBE_SFF_DA_ACTIVE_CABLE)
- hw->phy.type =
- ixgbe_phy_sfp_active_unknown;
- else
- hw->phy.type = ixgbe_phy_sfp_unknown;
+ hw->phy.type = ixgbe_phy_sfp_unknown;
break;
}
}
/* Allow any DA cable vendor */
if (cable_tech & (IXGBE_SFF_DA_PASSIVE_CABLE |
- IXGBE_SFF_DA_ACTIVE_CABLE)) {
+ IXGBE_SFF_DA_ACTIVE_CABLE)) {
+ if (cable_tech & IXGBE_SFF_DA_PASSIVE_CABLE)
+ hw->phy.type = ixgbe_phy_sfp_passive_unknown;
+ else if (cable_tech & IXGBE_SFF_DA_ACTIVE_CABLE)
+ hw->phy.type = ixgbe_phy_sfp_active_unknown;
status = IXGBE_SUCCESS;
goto out;
}
Index: src/sys/dev/pci/ixgbe/ixgbe_type.h
diff -u src/sys/dev/pci/ixgbe/ixgbe_type.h:1.31 src/sys/dev/pci/ixgbe/ixgbe_type.h:1.32
--- src/sys/dev/pci/ixgbe/ixgbe_type.h:1.31 Tue Feb 20 07:24:37 2018
+++ src/sys/dev/pci/ixgbe/ixgbe_type.h Thu Mar 15 06:48:51 2018
@@ -1,4 +1,4 @@
-/* $NetBSD: ixgbe_type.h,v 1.31 2018/02/20 07:24:37 msaitoh Exp $ */
+/* $NetBSD: ixgbe_type.h,v 1.32 2018/03/15 06:48:51 msaitoh Exp $ */
/******************************************************************************
SPDX-License-Identifier: BSD-3-Clause
@@ -294,6 +294,47 @@
#define IXGBE_I2C_CLOCK_STRETCHING_TIMEOUT 500
+
+#define NVM_OROM_OFFSET 0x17
+#define NVM_OROM_BLK_LOW 0x83
+#define NVM_OROM_BLK_HI 0x84
+#define NVM_OROM_PATCH_MASK 0xFF
+#define NVM_OROM_SHIFT 8
+
+#define NVM_VER_MASK 0x00FF /* version mask */
+#define NVM_VER_SHIFT 8 /* version bit shift */
+#define NVM_OEM_PROD_VER_PTR 0x1B /* OEM Product version block pointer */
+#define NVM_OEM_PROD_VER_CAP_OFF 0x1 /* OEM Product version format offset */
+#define NVM_OEM_PROD_VER_OFF_L 0x2 /* OEM Product version offset low */
+#define NVM_OEM_PROD_VER_OFF_H 0x3 /* OEM Product version offset high */
+#define NVM_OEM_PROD_VER_CAP_MASK 0xF /* OEM Product version cap mask */
+#define NVM_OEM_PROD_VER_MOD_LEN 0x3 /* OEM Product version module length */
+#define NVM_ETK_OFF_LOW 0x2D /* version low order word */
+#define NVM_ETK_OFF_HI 0x2E /* version high order word */
+#define NVM_ETK_SHIFT 16 /* high version word shift */
+#define NVM_VER_INVALID 0xFFFF
+#define NVM_ETK_VALID 0x8000
+#define NVM_INVALID_PTR 0xFFFF
+#define NVM_VER_SIZE 32 /* version sting size */
+
+struct ixgbe_nvm_version {
+ u32 etk_id;
+ u8 nvm_major;
+ u16 nvm_minor;
+ u8 nvm_id;
+
+ bool oem_valid;
+ u8 oem_major;
+ u8 oem_minor;
+ u16 oem_release;
+
+ bool or_valid;
+ u8 or_major;
+ u16 or_build;
+ u8 or_patch;
+
+};
+
/* Interrupt Registers */
#define IXGBE_EICR 0x00800
#define IXGBE_EICS 0x00808
@@ -1596,7 +1637,7 @@ struct ixgbe_dmac_config {
#define IXGBE_MDIO_GLOBAL_ALARM_1 0xCC00 /* Global alarm 1 */
#define IXGBE_MDIO_GLOBAL_ALM_1_DEV_FAULT 0x0010 /* device fault */
#define IXGBE_MDIO_GLOBAL_ALM_1_HI_TMP_FAIL 0x4000 /* high temp failure */
-#define IXGBE_MDIO_GLOBAL_FAULT_MSG 0xC850 /* Global Fault Message */
+#define IXGBE_MDIO_GLOBAL_FAULT_MSG 0xC850 /* Global Fault Message */
#define IXGBE_MDIO_GLOBAL_FAULT_MSG_HI_TMP 0x8007 /* high temp failure */
#define IXGBE_MDIO_GLOBAL_INT_MASK 0xD400 /* Global int mask */
#define IXGBE_MDIO_GLOBAL_AN_VEN_ALM_INT_EN 0x1000 /* autoneg vendor alarm int enable */
Index: src/sys/dev/pci/ixgbe/ixgbe_vf.h
diff -u src/sys/dev/pci/ixgbe/ixgbe_vf.h:1.11 src/sys/dev/pci/ixgbe/ixgbe_vf.h:1.12
--- src/sys/dev/pci/ixgbe/ixgbe_vf.h:1.11 Wed Dec 6 04:08:50 2017
+++ src/sys/dev/pci/ixgbe/ixgbe_vf.h Thu Mar 15 06:48:51 2018
@@ -1,34 +1,34 @@
-/* $NetBSD: ixgbe_vf.h,v 1.11 2017/12/06 04:08:50 msaitoh Exp $ */
+/* $NetBSD: ixgbe_vf.h,v 1.12 2018/03/15 06:48:51 msaitoh Exp $ */
/******************************************************************************
SPDX-License-Identifier: BSD-3-Clause
- Copyright (c) 2001-2017, Intel Corporation
+ Copyright (c) 2001-2017, Intel Corporation
All rights reserved.
-
- Redistribution and use in source and binary forms, with or without
+
+ Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
-
- 1. Redistributions of source code must retain the above copyright notice,
+
+ 1. Redistributions of source code must retain the above copyright notice,
this list of conditions and the following disclaimer.
-
- 2. Redistributions in binary form must reproduce the above copyright
- notice, this list of conditions and the following disclaimer in the
+
+ 2. Redistributions in binary form must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution.
-
- 3. Neither the name of the Intel Corporation nor the names of its
- contributors may be used to endorse or promote products derived from
+
+ 3. Neither the name of the Intel Corporation nor the names of its
+ contributors may be used to endorse or promote products derived from
this software without specific prior written permission.
-
+
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
- LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE.
Index: src/sys/dev/pci/ixgbe/ixgbe_x540.c
diff -u src/sys/dev/pci/ixgbe/ixgbe_x540.c:1.12 src/sys/dev/pci/ixgbe/ixgbe_x540.c:1.13
--- src/sys/dev/pci/ixgbe/ixgbe_x540.c:1.12 Wed Dec 6 04:08:50 2017
+++ src/sys/dev/pci/ixgbe/ixgbe_x540.c Thu Mar 15 06:48:51 2018
@@ -790,6 +790,9 @@ s32 ixgbe_acquire_swfw_sync_X540(struct
swmask |= swi2c_mask;
fwmask |= swi2c_mask << 2;
+ if (hw->mac.type == ixgbe_mac_X550)
+ timeout = 1000;
+
for (i = 0; i < timeout; i++) {
/* SW NVM semaphore bit is used for access to all
* SW_FW_SYNC bits (not just NVM)
Index: src/sys/dev/pci/ixgbe/ixgbe_x550.c
diff -u src/sys/dev/pci/ixgbe/ixgbe_x550.c:1.7 src/sys/dev/pci/ixgbe/ixgbe_x550.c:1.8
--- src/sys/dev/pci/ixgbe/ixgbe_x550.c:1.7 Wed Nov 8 08:41:13 2017
+++ src/sys/dev/pci/ixgbe/ixgbe_x550.c Thu Mar 15 06:48:51 2018
@@ -469,14 +469,10 @@ static s32 ixgbe_identify_phy_x550em(str
return ixgbe_identify_phy_generic(hw);
case IXGBE_DEV_ID_X550EM_X_1G_T:
hw->phy.type = ixgbe_phy_ext_1g_t;
- hw->phy.ops.read_reg = NULL;
- hw->phy.ops.write_reg = NULL;
break;
case IXGBE_DEV_ID_X550EM_A_1G_T:
case IXGBE_DEV_ID_X550EM_A_1G_T_L:
hw->phy.type = ixgbe_phy_fw;
- hw->phy.ops.read_reg = NULL;
- hw->phy.ops.write_reg = NULL;
if (hw->bus.lan_id)
hw->phy.phy_semaphore_mask |= IXGBE_GSSR_PHY1_SM;
else
@@ -1900,7 +1896,7 @@ static s32 ixgbe_setup_sgmii(struct ixgb
}
/**
- * ixgbe_setup_sgmii_fw - Set up link for sgmii with firmware-controlled PHYs
+ * ixgbe_setup_sgmii_fw - Set up link for internal PHY SGMII auto-negotiation
* @hw: pointer to hardware structure
*/
static s32 ixgbe_setup_sgmii_fw(struct ixgbe_hw *hw, ixgbe_link_speed speed,
@@ -2468,6 +2464,10 @@ s32 ixgbe_init_phy_ops_X550em(struct ixg
/* set up for CS4227 usage */
hw->phy.phy_semaphore_mask = IXGBE_GSSR_SHARED_I2C_SM;
break;
+ case IXGBE_DEV_ID_X550EM_X_1G_T:
+ phy->ops.read_reg_mdi = NULL;
+ phy->ops.write_reg_mdi = NULL;
+ break;
default:
break;
}
@@ -2604,7 +2604,8 @@ s32 ixgbe_reset_hw_X550em(struct ixgbe_h
DEBUGOUT1("Failed to initialize PHY ops, STATUS = %d\n",
status);
- if (status == IXGBE_ERR_SFP_NOT_SUPPORTED) {
+ if (status == IXGBE_ERR_SFP_NOT_SUPPORTED ||
+ status == IXGBE_ERR_PHY_ADDR_INVALID) {
DEBUGOUT("Returning from reset HW due to PHY init failure\n");
return status;
}
@@ -3279,6 +3280,8 @@ s32 ixgbe_read_ee_hostif_X550(struct ixg
buffer.address = IXGBE_CPU_TO_BE32(offset * 2);
/* one word */
buffer.length = IXGBE_CPU_TO_BE16(sizeof(u16));
+ buffer.pad2 = 0;
+ buffer.pad3 = 0;
status = hw->mac.ops.acquire_swfw_sync(hw, mask);
if (status)
@@ -3337,6 +3340,8 @@ s32 ixgbe_read_ee_hostif_buffer_X550(str
/* convert offset from words to bytes */
buffer.address = IXGBE_CPU_TO_BE32((offset + current_word) * 2);
buffer.length = IXGBE_CPU_TO_BE16(words_to_read * 2);
+ buffer.pad2 = 0;
+ buffer.pad3 = 0;
status = ixgbe_hic_unlocked(hw, (u32 *)&buffer, sizeof(buffer),
IXGBE_HI_COMMAND_TIMEOUT);
Index: src/sys/dev/pci/ixgbe/ixv.c
diff -u src/sys/dev/pci/ixgbe/ixv.c:1.87 src/sys/dev/pci/ixgbe/ixv.c:1.88
--- src/sys/dev/pci/ixgbe/ixv.c:1.87 Fri Mar 9 06:27:53 2018
+++ src/sys/dev/pci/ixgbe/ixv.c Thu Mar 15 06:48:51 2018
@@ -1,4 +1,4 @@
-/*$NetBSD: ixv.c,v 1.87 2018/03/09 06:27:53 msaitoh Exp $*/
+/*$NetBSD: ixv.c,v 1.88 2018/03/15 06:48:51 msaitoh Exp $*/
/******************************************************************************
@@ -828,10 +828,9 @@ ixv_init_locked(struct adapter *adapter)
return;
} /* ixv_init_locked */
-/*
- * MSI-X Interrupt Handlers and Tasklets
- */
-
+/************************************************************************
+ * ixv_enable_queue
+ ************************************************************************/
static inline void
ixv_enable_queue(struct adapter *adapter, u32 vector)
{
@@ -850,6 +849,9 @@ out:
mutex_exit(&que->im_mtx);
} /* ixv_enable_queue */
+/************************************************************************
+ * ixv_disable_queue
+ ************************************************************************/
static inline void
ixv_disable_queue(struct adapter *adapter, u32 vector)
{
@@ -1053,8 +1055,6 @@ ixv_media_status(struct ifnet *ifp, stru
ifp->if_baudrate = ifmedia_baudrate(ifmr->ifm_active);
IXGBE_CORE_UNLOCK(adapter);
-
- return;
} /* ixv_media_status */
/************************************************************************
@@ -1147,8 +1147,6 @@ ixv_set_multi(struct adapter *adapter)
adapter->hw.mac.ops.update_mc_addr_list(&adapter->hw, update_ptr, mcnt,
ixv_mc_array_itr, TRUE);
-
- return;
} /* ixv_set_multi */
/************************************************************************
@@ -1163,6 +1161,7 @@ ixv_mc_array_itr(struct ixgbe_hw *hw, u8
{
u8 *addr = *update_ptr;
u8 *newptr;
+
*vmdq = 0;
newptr = addr + IXGBE_ETH_LENGTH_OF_ADDRESS;
@@ -1336,8 +1335,6 @@ ixv_update_link_status(struct adapter *a
adapter->link_active = FALSE;
}
}
-
- return;
} /* ixv_update_link_status */
@@ -1789,6 +1786,7 @@ ixv_initialize_receive_units(struct adap
wmb();
/* Set the Tail Pointer */
+#ifdef DEV_NETMAP
/*
* In netmap mode, we must preserve the buffers made
* available to userspace before the if_init()
@@ -1805,7 +1803,6 @@ ixv_initialize_receive_units(struct adap
* RDT points to the last slot available for reception (?),
* so RDT = num_rx_desc - 1 means the whole ring is available.
*/
-#ifdef DEV_NETMAP
if ((adapter->feat_en & IXGBE_FEATURE_NETMAP) &&
(ifp->if_capenable & IFCAP_NETMAP)) {
struct netmap_adapter *na = NA(adapter->ifp);
@@ -1835,8 +1832,6 @@ ixv_initialize_receive_units(struct adap
rxcsum |= IXGBE_RXCSUM_IPPCSE;
IXGBE_WRITE_REG(hw, IXGBE_RXCSUM, rxcsum);
-
- return;
} /* ixv_initialize_receive_units */
/************************************************************************
@@ -2066,8 +2061,6 @@ ixv_enable_intr(struct adapter *adapter)
ixv_enable_queue(adapter, que->msix);
IXGBE_WRITE_FLUSH(hw);
-
- return;
} /* ixv_enable_intr */
/************************************************************************
@@ -2087,8 +2080,6 @@ ixv_disable_intr(struct adapter *adapter
ixv_disable_queue(adapter, que->msix);
IXGBE_WRITE_FLUSH(&adapter->hw);
-
- return;
} /* ixv_disable_intr */
/************************************************************************
@@ -2230,13 +2221,13 @@ ixv_update_stats(struct adapter *adapter
struct ixgbe_hw *hw = &adapter->hw;
struct ixgbevf_hw_stats *stats = &adapter->stats.vf;
- UPDATE_STAT_32(IXGBE_VFGPRC, stats->last_vfgprc, stats->vfgprc);
- UPDATE_STAT_32(IXGBE_VFGPTC, stats->last_vfgptc, stats->vfgptc);
- UPDATE_STAT_36(IXGBE_VFGORC_LSB, IXGBE_VFGORC_MSB, stats->last_vfgorc,
+ UPDATE_STAT_32(IXGBE_VFGPRC, stats->last_vfgprc, stats->vfgprc);
+ UPDATE_STAT_32(IXGBE_VFGPTC, stats->last_vfgptc, stats->vfgptc);
+ UPDATE_STAT_36(IXGBE_VFGORC_LSB, IXGBE_VFGORC_MSB, stats->last_vfgorc,
stats->vfgorc);
- UPDATE_STAT_36(IXGBE_VFGOTC_LSB, IXGBE_VFGOTC_MSB, stats->last_vfgotc,
+ UPDATE_STAT_36(IXGBE_VFGOTC_LSB, IXGBE_VFGOTC_MSB, stats->last_vfgotc,
stats->vfgotc);
- UPDATE_STAT_32(IXGBE_VFMPRC, stats->last_vfmprc, stats->vfmprc);
+ UPDATE_STAT_32(IXGBE_VFMPRC, stats->last_vfmprc, stats->vfmprc);
/* Fill out the OS statistics structure */
/*
