Module Name:    src
Committed By:   ryo
Date:           Tue Jul 10 08:35:58 UTC 2018

Modified Files:
        src/sys/arch/aarch64/aarch64: genassym.cf locore.S

Log Message:
allow to read CNTVCT_EL0 and CNTFRQ_EL0 from EL0


To generate a diff of this commit:
cvs rdiff -u -r1.3 -r1.4 src/sys/arch/aarch64/aarch64/genassym.cf
cvs rdiff -u -r1.9 -r1.10 src/sys/arch/aarch64/aarch64/locore.S

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/aarch64/aarch64/genassym.cf
diff -u src/sys/arch/aarch64/aarch64/genassym.cf:1.3 src/sys/arch/aarch64/aarch64/genassym.cf:1.4
--- src/sys/arch/aarch64/aarch64/genassym.cf:1.3	Mon Jul  9 06:19:53 2018
+++ src/sys/arch/aarch64/aarch64/genassym.cf	Tue Jul 10 08:35:58 2018
@@ -1,4 +1,4 @@
-# $NetBSD: genassym.cf,v 1.3 2018/07/09 06:19:53 ryo Exp $
+# $NetBSD: genassym.cf,v 1.4 2018/07/10 08:35:58 ryo Exp $
 #-
 # Copyright (c) 2014 The NetBSD Foundation, Inc.
 # All rights reserved.
@@ -264,6 +264,7 @@ define	DAIF_SETCLR_SHIFT	DAIF_SETCLR_SHI
 
 define	CNTHCTL_EL1PCTEN	CNTHCTL_EL1PCTEN
 define	CNTHCTL_EL1PCEN		CNTHCTL_EL1PCEN
+define	CNTKCTL_EL0VCTEN	CNTKCTL_EL0VCTEN
 define	SPSR_F			SPSR_F
 define	SPSR_I			SPSR_I
 define	SPSR_A			SPSR_A

Index: src/sys/arch/aarch64/aarch64/locore.S
diff -u src/sys/arch/aarch64/aarch64/locore.S:1.9 src/sys/arch/aarch64/aarch64/locore.S:1.10
--- src/sys/arch/aarch64/aarch64/locore.S:1.9	Tue Jul 10 08:20:29 2018
+++ src/sys/arch/aarch64/aarch64/locore.S	Tue Jul 10 08:35:58 2018
@@ -1,4 +1,4 @@
-/*	$NetBSD: locore.S,v 1.9 2018/07/10 08:20:29 ryo Exp $	*/
+/*	$NetBSD: locore.S,v 1.10 2018/07/10 08:35:58 ryo Exp $	*/
 
 /*
  * Copyright (c) 2017 Ryo Shimizu <r...@nerv.org>
@@ -36,7 +36,7 @@
 #include <aarch64/pte.h>
 #include "assym.h"
 
-RCSID("$NetBSD: locore.S,v 1.9 2018/07/10 08:20:29 ryo Exp $")
+RCSID("$NetBSD: locore.S,v 1.10 2018/07/10 08:35:58 ryo Exp $")
 
 /* #define DEBUG_LOCORE */
 /* #define DEBUG_MMU */
@@ -802,6 +802,11 @@ init_sysregs:
 	/* No trap system register access, and Trap FP/SIMD access */
 	msr	cpacr_el1, xzr
 
+	/* allow to read CNTVCT_EL0 and CNTFRQ_EL0 from EL0 */
+	mrs	x0, cntkctl_el1
+	orr	x0, x0, #CNTKCTL_EL0VCTEN
+	msr	cntkctl_el1, x0
+
 	/* any exception not masked */
 	msr	daif, xzr
 

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