Module Name: src
Committed By: maxv
Date: Sat Jul 14 07:54:04 UTC 2018
Modified Files:
src/usr.sbin/tprof: tprof_analyze.c
src/usr.sbin/tprof/arch: tprof_x86.c
Log Message:
Finish the Skylake/Kabylake table, and improve the output of "tprof analyze".
To generate a diff of this commit:
cvs rdiff -u -r1.2 -r1.3 src/usr.sbin/tprof/tprof_analyze.c
cvs rdiff -u -r1.3 -r1.4 src/usr.sbin/tprof/arch/tprof_x86.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/usr.sbin/tprof/tprof_analyze.c
diff -u src/usr.sbin/tprof/tprof_analyze.c:1.2 src/usr.sbin/tprof/tprof_analyze.c:1.3
--- src/usr.sbin/tprof/tprof_analyze.c:1.2 Fri Jul 13 12:04:50 2018
+++ src/usr.sbin/tprof/tprof_analyze.c Sat Jul 14 07:54:04 2018
@@ -1,4 +1,4 @@
-/* $NetBSD: tprof_analyze.c,v 1.2 2018/07/13 12:04:50 maxv Exp $ */
+/* $NetBSD: tprof_analyze.c,v 1.3 2018/07/14 07:54:04 maxv Exp $ */
/*
* Copyright (c) 2010,2011,2012 YAMAMOTO Takashi,
@@ -28,7 +28,7 @@
#include <sys/cdefs.h>
#ifndef lint
-__RCSID("$NetBSD: tprof_analyze.c,v 1.2 2018/07/13 12:04:50 maxv Exp $");
+__RCSID("$NetBSD: tprof_analyze.c,v 1.3 2018/07/14 07:54:04 maxv Exp $");
#endif /* not lint */
#include <assert.h>
@@ -275,7 +275,8 @@ tprof_analyze(int argc, char **argv)
struct addr *a;
struct addr **l;
struct addr **p;
- size_t naddrs, i;
+ size_t naddrs, nsamples, i;
+ float perc;
int ch;
bool distinguish_processes = true;
bool distinguish_cpus = true;
@@ -339,6 +340,7 @@ tprof_analyze(int argc, char **argv)
*/
naddrs = 0;
+ nsamples = 0;
while (/*CONSTCOND*/true) {
struct addr *o;
tprof_sample_t sample;
@@ -400,6 +402,7 @@ tprof_analyze(int argc, char **argv)
} else {
naddrs++;
}
+ nsamples++;
}
/*
@@ -418,7 +421,10 @@ tprof_analyze(int argc, char **argv)
* print addresses and number of samples, preferably with
* resolved symbol names.
*/
-
+ printf("File: %s\n", argv[0]);
+ printf("Number of samples: %zu\n\n", nsamples);
+ printf("percentage nsamples pid lwp cpu k address symbol\n");
+ printf("------------ -------- ------ ---- ---- - ---------------- ------\n");
for (i = 0; i < naddrs; i++) {
const char *name;
char buf[100];
@@ -439,8 +445,12 @@ tprof_analyze(int argc, char **argv)
offset);
name = buf;
}
- printf("%8u %6" PRIu32 " %4" PRIu32 " %2" PRIu32 " %u %016"
+
+ perc = ((float)a->nsamples / (float)nsamples) * 100.0;
+
+ printf("%11f%% %8u %6" PRIu32 " %4" PRIu32 " %4" PRIu32 " %u %016"
PRIx64 " %s\n",
+ perc,
a->nsamples, a->pid, a->lwpid, a->cpuid, a->in_kernel,
a->addr, name);
}
Index: src/usr.sbin/tprof/arch/tprof_x86.c
diff -u src/usr.sbin/tprof/arch/tprof_x86.c:1.3 src/usr.sbin/tprof/arch/tprof_x86.c:1.4
--- src/usr.sbin/tprof/arch/tprof_x86.c:1.3 Fri Jul 13 09:53:42 2018
+++ src/usr.sbin/tprof/arch/tprof_x86.c Sat Jul 14 07:54:04 2018
@@ -1,4 +1,4 @@
-/* $NetBSD: tprof_x86.c,v 1.3 2018/07/13 09:53:42 maxv Exp $ */
+/* $NetBSD: tprof_x86.c,v 1.4 2018/07/14 07:54:04 maxv Exp $ */
/*
* Copyright (c) 2018 The NetBSD Foundation, Inc.
@@ -119,11 +119,156 @@ init_intel_arch1(void)
}
/*
- * Intel Skylake/Kabylake. TODO: there are many more events available.
+ * Intel Skylake/Kabylake.
+ *
+ * The events that are not listed, because they are of little interest or
+ * require extra configuration:
+ * TX_*
+ * FRONTEND_RETIRED.*
+ * FP_ARITH_INST_RETIRED.*
+ * HLE_RETIRED.*
+ * RTM_RETIRED.*
+ * MEM_TRANS_RETIRED.*
+ * UOPS_DISPATCHED_PORT.*
*/
static struct name_to_event intel_skylake_kabylake_names[] = {
/* Event Name - Event Select - UMask */
- { "itlb-misses-causes-a-walk", 0x85, 0x01, true },
+ { "LD_BLOCKS.STORE_FORWARD", 0x03, 0x02, true },
+ { "LD_BLOCKS.NO_SR", 0x03, 0x08, true },
+ { "LD_BLOCKS_PARTIAL.ADDRESS_ALIAS", 0x07, 0x01, true },
+ { "DTLB_LOAD_MISSES.MISS_CAUSES_A_WALK", 0x08, 0x01, true },
+ { "DTLB_LOAD_MISSES.WALK_COMPLETED_4K", 0x08, 0x02, true },
+ { "DTLB_LOAD_MISSES.WALK_COMPLETED_2M_4M", 0x08, 0x04, true },
+ { "DTLB_LOAD_MISSES.WALK_COMPLETED_1G", 0x08, 0x08, true },
+ { "DTLB_LOAD_MISSES.WALK_COMPLETED", 0x08, 0x0E, true },
+ { "DTLB_LOAD_MISSES.WALK_PENDING", 0x08, 0x10, true },
+ { "DTLB_LOAD_MISSES.STLB_HIT", 0x08, 0x20, true },
+ { "INT_MISC.RECOVERY_CYCLES", 0x0D, 0x01, true },
+ { "INT_MISC.CLEAR_RESTEER_CYCLES", 0x0D, 0x80, true },
+ { "UOPS_ISSUED.ANY", 0x0E, 0x01, true },
+ { "UOPS_ISSUED.VECTOR_WIDTH_MISMATCH", 0x0E, 0x02, true },
+ { "UOPS_ISSUED.SLOW_LEA", 0x0E, 0x20, true },
+ { "L2_RQSTS.DEMAND_DATA_RD_MISS", 0x24, 0x21, true },
+ { "L2_RQSTS.RFO_MISS", 0x24, 0x22, true },
+ { "L2_RQSTS.CODE_RD_MISS", 0x24, 0x24, true },
+ { "L2_RQSTS.ALL_DEMAND_MISS", 0x24, 0x27, true },
+ { "L2_RQSTS.PF_MISS", 0x24, 0x38, true },
+ { "L2_RQSTS.MISS", 0x24, 0x3F, true },
+ { "L2_RQSTS.DEMAND_DATA_RD_HIT", 0x24, 0x41, true },
+ { "L2_RQSTS.RFO_HIT", 0x24, 0x42, true },
+ { "L2_RQSTS.CODE_RD_HIT", 0x24, 0x44, true },
+ { "L2_RQSTS.PF_HIT", 0x24, 0xD8, true },
+ { "L2_RQSTS.ALL_DEMAND_DATA_RD", 0x24, 0xE1, true },
+ { "L2_RQSTS.ALL_RFO", 0x24, 0xE2, true },
+ { "L2_RQSTS.ALL_CODE_RD", 0x24, 0xE4, true },
+ { "L2_RQSTS.ALL_DEMAND_REFERENCES", 0x24, 0xE7, true },
+ { "L2_RQSTS.ALL_PF", 0x24, 0xF8, true },
+ { "L2_RQSTS.REFERENCES", 0x24, 0xFF, true },
+ { "SW_PREFETCH_ACCESS.NTA", 0x32, 0x01, true },
+ { "SW_PREFETCH_ACCESS.T0", 0x32, 0x02, true },
+ { "SW_PREFETCH_ACCESS.T1_T2", 0x32, 0x04, true },
+ { "SW_PREFETCH_ACCESS.PREFETCHW", 0x32, 0x08, true },
+ { "CPU_CLK_THREAD_UNHALTED.ONE_THREAD_ACTIVE", 0x3C, 0x02, true },
+ { "CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE", 0x3C, 0x02, true },
+ { "L1D_PEND_MISS.PENDING", 0x48, 0x01, true },
+ { "L1D_PEND_MISS.FB_FULL", 0x48, 0x02, true },
+ { "DTLB_STORE_MISSES.MISS_CAUSES_A_WALK", 0x49, 0x01, true },
+ { "DTLB_STORE_MISSES.WALK_COMPLETED_4K", 0x49, 0x02, true },
+ { "DTLB_STORE_MISSES.WALK_COMPLETED_2M_4M", 0x49, 0x04, true },
+ { "DTLB_STORE_MISSES.WALK_COMPLETED_1G", 0x49, 0x08, true },
+ { "DTLB_STORE_MISSES.WALK_COMPLETED", 0x49, 0x0E, true },
+ { "DTLB_STORE_MISSES.WALK_PENDING", 0x49, 0x10, true },
+ { "DTLB_STORE_MISSES.STLB_HIT", 0x49, 0x20, true },
+ { "LOAD_HIT_PRE.SW_PF", 0x4C, 0x01, true },
+ { "EPT.WALK_PENDING", 0x4F, 0x10, true },
+ { "L1D.REPLACEMENT", 0x51, 0x01, true },
+ { "RS_EVENTS.EMPTY_CYCLES", 0x5E, 0x01, true },
+ { "OFFCORE_REQUESTS_OUTSTANDING.DEMAND_DATA_RD", 0x60, 0x01, true },
+ { "OFFCORE_REQUESTS_OUTSTANDING.DEMAND_CODE_RD", 0x60, 0x02, true },
+ { "OFFCORE_REQUESTS_OUTSTANDING.DEMAND_RFO", 0x60, 0x04, true },
+ { "OFFCORE_REQUESTS_OUTSTANDING.ALL_DATA_RD", 0x60, 0x08, true },
+ { "OFFCORE_REQUESTS_OUTSTANDING.L3_MISS_DEMAND_DATA_RD", 0x60, 0x10, true },
+ { "IDQ.MITE_UOPS", 0x79, 0x04, true },
+ { "IDQ.DSB_UOPS", 0x79, 0x08, true },
+ { "IDQ.MS_MITE_UOPS", 0x79, 0x20, true },
+ { "IDQ.MS_UOPS", 0x79, 0x30, true },
+ { "ICACHE_16B.IFDATA_STALL", 0x80, 0x04, true },
+ { "ICACHE_64B.IFTAG_HIT", 0x83, 0x01, true },
+ { "ICACHE_64B.IFTAG_MISS", 0x83, 0x02, true },
+ { "ICACHE_64B.IFTAG_STALL", 0x83, 0x04, true },
+ { "ITLB_MISSES.MISS_CAUSES_A_WALK", 0x85, 0x01, true },
+ { "ITLB_MISSES.WALK_COMPLETED_4K", 0x85, 0x02, true },
+ { "ITLB_MISSES.WALK_COMPLETED_2M_4M", 0x85, 0x04, true },
+ { "ITLB_MISSES.WALK_COMPLETED_1G", 0x85, 0x08, true },
+ { "ITLB_MISSES.WALK_COMPLETED", 0x85, 0x0E, true },
+ { "ITLB_MISSES.WALK_PENDING", 0x85, 0x10, true },
+ { "ITLB_MISSES.STLB_HIT", 0x85, 0x20, true },
+ { "ILD_STALL.LCP", 0x87, 0x01, true },
+ { "IDQ_UOPS_NOT_DELIVERED.CORE", 0x9C, 0x01, true },
+ { "RESOURCE_STALLS.ANY", 0xA2, 0x01, true },
+ { "RESOURCE_STALLS.SB", 0xA2, 0x08, true },
+ { "EXE_ACTIVITY.EXE_BOUND_0_PORTS", 0xA6, 0x01, true },
+ { "EXE_ACTIVITY.1_PORTS_UTIL", 0xA6, 0x02, true },
+ { "EXE_ACTIVITY.2_PORTS_UTIL", 0xA6, 0x04, true },
+ { "EXE_ACTIVITY.3_PORTS_UTIL", 0xA6, 0x08, true },
+ { "EXE_ACTIVITY.4_PORTS_UTIL", 0xA6, 0x10, true },
+ { "EXE_ACTIVITY.BOUND_ON_STORES", 0xA6, 0x40, true },
+ { "LSD.UOPS", 0xA8, 0x01, true },
+ { "DSB2MITE_SWITCHES.PENALTY_CYCLES", 0xAB, 0x02, true },
+ { "ITLB.ITLB_FLUSH", 0xAE, 0x01, true },
+ { "OFFCORE_REQUESTS.DEMAND_DATA_RD", 0xB0, 0x01, true },
+ { "OFFCORE_REQUESTS.DEMAND_CODE_RD", 0xB0, 0x02, true },
+ { "OFFCORE_REQUESTS.DEMAND_RFO", 0xB0, 0x04, true },
+ { "OFFCORE_REQUESTS.ALL_DATA_RD", 0xB0, 0x08, true },
+ { "OFFCORE_REQUESTS.L3_MISS_DEMAND_DATA_RD", 0xB0, 0x10, true },
+ { "OFFCORE_REQUESTS.ALL_REQUESTS", 0xB0, 0x80, true },
+ { "UOPS_EXECUTED.THREAD", 0xB1, 0x01, true },
+ { "UOPS_EXECUTED.CORE", 0xB1, 0x02, true },
+ { "UOPS_EXECUTED.X87", 0xB1, 0x10, true },
+ { "OFFCORE_REQUESTS_BUFFER.SQ_FULL", 0xB2, 0x01, true },
+ { "TLB_FLUSH.DTLB_THREAD", 0xBD, 0x01, true },
+ { "TLB_FLUSH.STLB_ANY", 0xBD, 0x20, true },
+ { "INST_RETIRED.PREC_DIST", 0xC0, 0x01, true },
+ { "OTHER_ASSISTS.ANY", 0xC1, 0x3F, true },
+ { "UOPS_RETIRED.RETIRE_SLOTS", 0xC2, 0x02, true },
+ { "MACHINE_CLEARS.MEMORY_ORDERING", 0xC3, 0x02, true },
+ { "MACHINE_CLEARS.SMC", 0xC3, 0x04, true },
+ { "BR_INST_RETIRED.CONDITIONAL", 0xC4, 0x01, true },
+ { "BR_INST_RETIRED.NEAR_CALL", 0xC4, 0x02, true },
+ { "BR_INST_RETIRED.NEAR_RETURN", 0xC4, 0x08, true },
+ { "BR_INST_RETIRED.NOT_TAKEN", 0xC4, 0x10, true },
+ { "BR_INST_RETIRED.NEAR_TAKEN", 0xC4, 0x20, true },
+ { "BR_INST_RETIRED.FAR_BRANCH", 0xC4, 0x40, true },
+ { "BR_MISP_RETIRED.CONDITIONAL", 0xC5, 0x01, true },
+ { "BR_MISP_RETIRED.NEAR_CALL", 0xC5, 0x02, true },
+ { "BR_MISP_RETIRED.NEAR_TAKEN", 0xC5, 0x20, true },
+ { "HW_INTERRUPTS.RECEIVED", 0xCB, 0x01, true },
+ { "MEM_INST_RETIRED.STLB_MISS_LOADS", 0xD0, 0x11, true },
+ { "MEM_INST_RETIRED.STLB_MISS_STORES", 0xD0, 0x12, true },
+ { "MEM_INST_RETIRED.LOCK_LOADS", 0xD0, 0x21, true },
+ { "MEM_INST_RETIRED.SPLIT_LOADS", 0xD0, 0x41, true },
+ { "MEM_INST_RETIRED.SPLIT_STORES", 0xD0, 0x42, true },
+ { "MEM_INST_RETIRED.ALL_LOADS", 0xD0, 0x81, true },
+ { "MEM_INST_RETIRED.ALL_STORES", 0xD0, 0x82, true },
+ { "MEM_LOAD_RETIRED.L1_HIT", 0xD1, 0x01, true },
+ { "MEM_LOAD_RETIRED.L2_HIT", 0xD1, 0x02, true },
+ { "MEM_LOAD_RETIRED.L3_HIT", 0xD1, 0x04, true },
+ { "MEM_LOAD_RETIRED.L1_MISS", 0xD1, 0x08, true },
+ { "MEM_LOAD_RETIRED.L2_MISS", 0xD1, 0x10, true },
+ { "MEM_LOAD_RETIRED.L3_MISS", 0xD1, 0x20, true },
+ { "MEM_LOAD_RETIRED.FB_HIT", 0xD1, 0x40, true },
+ { "MEM_LOAD_L3_HIT_RETIRED.XSNP_MISS", 0xD2, 0x01, true },
+ { "MEM_LOAD_L3_HIT_RETIRED.XSNP_HIT", 0xD2, 0x02, true },
+ { "MEM_LOAD_L3_HIT_RETIRED.XSNP_HITM", 0xD2, 0x04, true },
+ { "MEM_LOAD_L3_HIT_RETIRED.XSNP_NONE", 0xD2, 0x08, true },
+ { "MEM_LOAD_MISC_RETIRED.UC", 0xD4, 0x04, true },
+ { "BACLEARS.ANY", 0xE6, 0x01, true },
+ { "L2_TRANS.L2_WB", 0xF0, 0x40, true },
+ { "L2_LINES_IN.ALL", 0xF1, 0x1F, true },
+ { "L2_LINES_OUT.SILENT", 0xF2, 0x01, true },
+ { "L2_LINES_OUT.NON_SILENT", 0xF2, 0x02, true },
+ { "L2_LINES_OUT.USELESS_HWPF", 0xF2, 0x04, true },
+ { "SQ_MISC.SPLIT_LOCK", 0xF4, 0x10, true },
};
static struct event_table intel_skylake_kabylake = {
