Module Name: src Committed By: jmcneill Date: Sun Sep 8 10:43:51 UTC 2013
Modified Files:
src/sys/arch/arm/allwinner: awin_ahcisata.c
Log Message:
correct a typo in the reg name polled while waiting for phy calibration
To generate a diff of this commit:
cvs rdiff -u -r1.6 -r1.7 src/sys/arch/arm/allwinner/awin_ahcisata.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
