Module Name: src Committed By: mrg Date: Sat Aug 8 07:52:52 UTC 2015
Modified Files:
src/sbin/drvctl: drvctl.8
Log Message:
add an example for rescanning ATA busses.
To generate a diff of this commit:
cvs rdiff -u -r1.16 -r1.17 src/sbin/drvctl/drvctl.8
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
