Module Name: src Committed By: msaitoh Date: Mon Oct 19 02:45:26 UTC 2015
Modified Files:
src/sys/arch/x86/include: cacheinfo.h
Log Message:
Add some TLB entries from the latest Intel SDM. This change might incorrect
because the document itself is very strange.
To generate a diff of this commit:
cvs rdiff -u -r1.19 -r1.20 src/sys/arch/x86/include/cacheinfo.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
