Module Name: src Committed By: msaitoh Date: Tue Oct 3 03:12:29 UTC 2017
Modified Files: src/sys/dev/pci/ixgbe: ixv.c Log Message: Fix a problem that mailbox interrupt never occured. Bit definitions of PF's interrupt related registers and VF's interrupt registers a completely different. VF's registers (VF{EICR, EICS, EIMS, EIMC, EIAC, EIAM})'s bits are just MSI-X vector bitmask, so read/write correctly. Read VTEICR instead of VTEICS in ixv_msix_mbx (note that "PF" has a errata that EICS is required to read the cause). Don't write IXGBE_VTEICR in ixv_msix_mbx() because we use auto-clear for mailbox interrupt. We have gotten link status change by timer instead of interrupt before this fix... To generate a diff of this commit: cvs rdiff -u -r1.67 -r1.68 src/sys/dev/pci/ixgbe/ixv.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.