CVSROOT: /cvs Module name: src Changes by: [email protected] 2018/07/30 08:44:23
Modified files:
sys/arch/amd64/amd64: Tag: OPENBSD_6_2 identcpu.c
sys/arch/i386/i386: Tag: OPENBSD_6_2 machdep.c
Log message:
Add "Mitigation G-2" per AMD's Whitepaper "Software Techniques for
Managing Speculation on AMD Processors"
By setting "chicken bit" MSR C001_1029[1]=1, LFENCE becomes a dispatch
serializing instruction.
ok deraadt@ mlarkin@ guenther@
OpenBSD 6.2 errata 019
