CVSROOT: /cvs
Module name: src
Changes by: v...@cvs.openbsd.org 2019/08/21 10:14:34
Modified files:
sys/arch/mips64/include: pmap.h
sys/arch/mips64/mips64: context.S pmap.c
Log message:
Fix a race in invalidation of remote TLB entries.
If a CPU updates a pmap concurrently with the activation of that pmap
on another CPU, invalidation of TLB entries might be incomplete.
It is also possible that a CPU altogether stops updating its TLB.
Prevent the race by synchronizing pmap activations and logic that
determines where to send TLB invalidation IPIs.
To avoid mutex wait without ability to process IPIs, the context switch
code is adjusted to call pmap_activate() with interrupts enabled.
In practice, interrupts up to IPL_SCHED are still disabled on context
switch.
