CVSROOT: /cvs
Module name: src
Changes by: [email protected] 2020/03/11 15:04:58
Modified files:
sys/arch/arm/arm: cpuswitch7.S exception.S irq_dispatch.S
Log message:
Anthony Steinhauser reports that 32-bit arm cpus have the same speculation
problems as 64-bit models. "movs pc, lr" is the pre-VM legacy eret and
as such also requires speculation blockers. Idiomatically spray
"dsb nsh; ish" after each such occurance because it is cheap.
(I find it very interesting 2/3 of these occur at end of a .o, so the
instructions speculatively executed are from a randomly different .o file
after each kernel relink...)
ok kettenis
