CVSROOT: /cvs Module name: src Changes by: [email protected] 2021/05/04 19:28:38
Modified files:
sys/arch/riscv64/riscv64: trap.c
Log message:
riscv: Assert that SUM is not set in SSTATUS for exceptions.
>From John Baldwin
6a3a6fe34bf36b6e745b3e9ad1a991de057729c7 in FreeBSD
ok kettenis@ mlarkin@
