CVSROOT: /cvs
Module name: src
Changes by: [email protected] 2021/05/09 17:22:25
Modified files:
sys/arch/riscv64/include: cpu.h
sys/arch/riscv64/riscv64: trap.c fpu.c
Log message:
fpu_valid_opcode() did not correctly handle 16 bit fp instructions
such as an stval of 0xaa22. The RISC-V Instruction Set Manual states
that setting stval to a non-zero value with the instruction on illegal
instruction exception is an optional feature so instead of changing
fpu_valid_opcode() remove it entirely.
ok deraadt@ kettenis@ drahn@
