CVSROOT: /cvs
Module name: src
Changes by: [email protected] 2021/06/25 07:25:54
Modified files:
sys/arch/riscv64/include: atomic.h
Log message:
use weaker fences for riscv64 membar
Fences are described in 'RISC-V Unprivileged ISA' syntax is
'fence predecessor,successor'.
"Any combination of device input (I), device output (O), memory reads (R),
and memory writes (W) may be ordered with respect to any combination
of the same."
Previously "fence" was used for membar_* which is short for
"fence iorw,iorw". Change this to more specific fences based on the
text in membar_sync(9) with store -> w, load -> r.
build test by and ok kettenis@
