CVSROOT: /cvs Module name: src Changes by: kette...@cvs.openbsd.org 2021/07/24 12:15:13
Modified files:
sys/arch/riscv64/include: cpu.h
sys/arch/riscv64/riscv64: cpu.c pmap.c
Log message:
Implement a workaround for the SiFive FU740 CIP-1200 errata.
Remove the (incomplete) support for ASIDs. RISC-V hardware that implements
ASIDs doesn't exist at this moment and the current code interferes with
the errata workaround and other pmap improvements we're planning to make.
ok drahn@, jca@, deraadt@
