CVSROOT: /cvs
Module name: src
Changes by: [email protected] 2026/05/02 08:09:17
Modified files:
sys/arch/riscv64/include: cpu.h elf.h
sys/arch/riscv64/riscv64: autoconf.c cpu.c
Log message:
Improve CPU identification and hwcap for riscv64.
On riscv64 we currently only expose a fixed hwcap value (G + C) and do not
actually report any of what the CPUs provide via extensions. This means
that userland cannot detect and make use of additional instructions that
exist.
Rework cpu_identify() so that we build hwcap/hwcap2, then use this to select
the correct functions/support to use if we're on the primary CPU (rather
than doing this for every CPU). Check that the secondary CPUs have the same
features as the primary CPU (although this is coming from the DTB and not
the actual hardware).
Finally report available extensions via hwcap/hwcap2 so that we can
make use of these instructions in userland.
ok kettenis@ jca@
