CVSROOT: /cvs
Module name: src
Changes by: [email protected] 2012/04/08 16:08:26
Modified files:
sys/arch/sgi/hpc: hpc.c hpcvar.h if_sq.c iocreg.h
Log message:
Be more careful when reprogramming the sq(4) DMA and PIO timing parameters;
the current logic can be traced back to DaveM's intership at SGI in 1996,
and are adequate for the hardware he had access to.
However, ``recent'' Indigo2 and Indy systems are fit with a faster (33MHz
instead of 25MHz) GIO64 bus, which need different timing parameters, and
guess what? The PROM knows the right values to set.
Since programming these timing registers was apparently only necessary for
the Challenge S second interface:
1) only reprogram those registers on an IP24 (Indy, Challenge S) system.
2) pick proper values depending upon the actual GIO64 bus speed.
Item #1 fixes Ethernet operation on Indigo2 (at least my teal R4400SC).
Item #2 fixes Ethernet operation on my R5000SC Indy.
For the record, programming unoptimal value caused `TX DMA underrun' errors
(documented as `can't happen' in the HPC3 documentation, oh the irony),
which could be reproduced reliably with ypbind(8).
