CVSROOT: /cvs
Module name: src
Changes by: [email protected] 2013/04/11 22:48:52
Modified files:
sys/arch/m88k/m88k: trap.c
Log message:
Double-register load and store instructions using an odd-numbered register as
the low part trigger an `illegal instruction' trap on the 88110 (and I can't
see this documented anywhere in the manual). Of course there is code "in the
wild" which uses such constructs (libgmp is one such example).
Extend double_reg_fixup() to take the trap type as an extra argument, and
explicitely allow ld.d or st.d instructions with odd-numbered registers at
aligned addresses if we are invoked from the `illegal instruction' trap
handler, to give this code a chance to run on 88110.
