CVSROOT: /cvs Module name: src Changes by: [email protected] 2016/08/19 08:05:23
Modified files:
sys/arch/arm/include: pmap.h
Log message:
Adjust the definitions of L1_S_COHERENT_v7, L2_L_COHERENT_v7 and
L2_S_COHERENT_v7 such that bus_dmamap_sync(9) avoids unnecessary cache
flushes again for DMA'able memory mapped with the BUS_DMA_COHERENT flag.
I broke this in pmap7.c rev 1.35.
ok tom@
