CVSROOT: /cvs Module name: src Changes by: v...@cvs.openbsd.org 2017/06/10 21:35:30
Modified files:
sys/arch/mips64/include: cpu.h mips_cpu.h
sys/arch/mips64/mips64: mips64r2.S
sys/arch/octeon/octeon: machdep.c
Log message:
Fix TLB size computation on OCTEON II and III. The CPUs have utilized
the whole TLB space even before this. However, TLB initialization on
boot and TLB flush on ASID wraparound have been incomplete. These have
caused crashes of processes.
