Hello,

I'm trying to put a Blade 150 to use.  I installed two 160 GB UDMA
drives to replace the 40 GB Seagate drive the machine shipped with.
Unfortunately, the Blade 150 uses the ALI (Acer) M5229 series ATA controller
chip, which (at least for the revs on these Suns) can't do DMA simultaneously
with LBA48 addressing.

In src/sys/dev/pci/pciide.c the acer_dma_init function
seems to handle this by checking to see if the LBA48 flag is turned on, and if
so, returning EINVAL , resulting in PIO transfers only for the disk.  I would
much rather use DMA with some loss of capacity than use PIO, particularly with
the disks I have (it wouldn't be much capacity lost).


See also the thread
at: http://marc.info/?l=freebsd-current&m=112404856418435&w=2


(Q1): Is there
a way to tell the wd or pciide drivers to not use LBA48 even if the drive
supports it?  Looking through the sources, I don't think there is, but I
thought I'd ask to be sure.

(Q2): Assuming there is not a provided way to
turn off LBA48, in terms of booted disk geometry for the disklabels and
filesystems, will the only difference be the number of available cylinders
between LBA48 and "regular" (28-bit) LBA?

Elucidating:
-Suppose I install 4.9
or 5.0 off the bootable install CD with the default LBA48/PIO support, and
make sure that all slices fall below the 128 GiB boundary.  I think disklabel
says that slices need to be on cylinder boundaries, so I would just make sure
to stop allocating slices when I reached the last cylinder fully contained at
or below 128 GiB.
-After that, I then boot the system off disk, patch
src/sys/dev/ata/wd.c to turn off LBA48, build a new kernel, and boot using the
new kernel.
-Then will all the slices and filesystems I created earlier be
accessible just the same, without any errors?


Would there be any translation
differences other than the number of cylinders that would cause issues?  Would
there be any kind of free space tracking in the partition table that would
need to be addressed?


(Q3): Also, is there an easy way to make sure the
controller is being set to use DMA at all?  I'm not an expert in the IDE / ATA
drivers, but it looks like once the controller and device are known to be
capable of DMA, the determination is made on a specific transfer-by-transfer
basis as to whether DMA or PIO get used?  I base this on _wdc_ata_bio_start in
src/sys/dev/ata/ata_wdc.c .  So for the Blade 150, when acer_dma_init is
eventually called from within 
_wdc_ata_bio_start , the LBA48-based decision
to return EINVAL results 
in a "silent" downgrade to PIO mode, on a
per-transfer basis.  Is my 
understanding correct?

If so it doesn't appear
like there's a straightforward way to make sure that generally speaking,
transfers are or are not using DMA, but again I'd like to ask you experts.
Thank you very much.

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