From: Andy Getzendanner <[email protected]> This patch corrects the behavior of bfin_spi_setup() to clear bits LSBF, CPHA, and CPOL in the SPI control register when required by the desired SPI configuration. The patch also modifies bfin_spi_setup() to set/clear the SIZE bit as appropriate. Signed-off-by: Andy Getzendanner <[email protected]> --- The control bits LSBF, CPHA, and CPOL are set by bfin_spi_setup() when appropriate, but the function appears to assume they are clear at entry and leaves them untouched when the desired configuration calls for them to be clear. The SIZE bit is never set or cleared. bfin_spi_setup() is triggered in response to an ioctl which calls for the SPI configuration to be changed, but the settings controlled by LSBF, CPHA, and CPOL cannot be changed away from the setting implied by the value 1. Additionally, the word length setting (controlled by SIZE) is not set correctly. The patch has been tested against 2.6.30.4 (it applies against 2.6.32.1) and observed to correct the behavior of the affected ioctl. Please CC me at [email protected] in any replies as I am not on the list. --- linux-2.6.32.1/drivers/spi/spi_bfin5xx.c.orig 2009-12-14 12:47:25.000000000 -0500 +++ linux-2.6.32.1/drivers/spi/spi_bfin5xx.c 2009-12-18 00:27:10.000000000 -0500 @@ -1051,10 +1051,16 @@ static int bfin_spi_setup(struct spi_dev /* translate common spi framework into our register */ if (spi->mode & SPI_CPOL) chip->ctl_reg |= CPOL; + else + chip->ctl_reg &= ~CPOL; if (spi->mode & SPI_CPHA) chip->ctl_reg |= CPHA; + else + chip->ctl_reg &= ~CPHA; if (spi->mode & SPI_LSB_FIRST) chip->ctl_reg |= LSBF; + else + chip->ctl_reg &= ~LSBF; /* we dont support running in slave mode (yet?) */ chip->ctl_reg |= MSTR; @@ -1106,6 +1112,7 @@ static int bfin_spi_setup(struct spi_dev bfin_spi_u8_cs_chg_writer : bfin_spi_u8_writer; chip->duplex = chip->cs_change_per_word ? bfin_spi_u8_cs_chg_duplex : bfin_spi_u8_duplex; + chip->ctl_reg &= ~SIZE; break; case 16: @@ -1117,6 +1124,7 @@ static int bfin_spi_setup(struct spi_dev bfin_spi_u16_cs_chg_writer : bfin_spi_u16_writer; chip->duplex = chip->cs_change_per_word ? bfin_spi_u16_cs_chg_duplex : bfin_spi_u16_duplex; + chip->ctl_reg |= SIZE; break; default:
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