On 4/10/10, Mika Westerberg <mika.westerb...@iki.fi> wrote:
> Can you try following with your devices?
Woo, nice one!
Same CPU usage (~57%) same throughput (315kb/s) and it's much more
elegant. :) Just using repeated interrupts to handle the last 4 words
instead of the nasty busy-wait loops seems fairer to other interrupts
too!
You can make it even smaller be removing some redundant checks
deriving from the fact that it's synchronous, so N writes always cause
N reads:
> if (espi->tx == 0 && espi->rx == 0)
> espi->fifo_level = 0;
can be
if (espi->tx == 0)
espi->fifo_level = 0;
,
> while ((ep93xx_spi_read_u8(espi, SSPSR) & SSPSR_RNE) &&
> espi->rx < t->len) {
while ((ep93xx_spi_read_u8(espi, SSPSR) & SSPSR_RNE)) {
and
> /* is transfer finished? */
> if (espi->tx == t->len && espi->rx == t->len) {
if (espi->rx == t->len) {
Cheers!
M
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