On Mon, Apr 19, 2010 at 12:52 PM, Martin Guy <martinw...@gmail.com> wrote:
> On 4/19/10, Grant Likely <grant.lik...@secretlab.ca> wrote:
>> >> > + /*
>> >> > + * Calculate divisors so that we can get speed according the
>> >> > + * following formula:
>> >> > + * rate = spi_clock_rate / (cpsr * (1 + scr))
>> >> > + *
>> >> > + * cpsr must be even number and starts from 2, scr can be any
>> number
>> >> > + * between 0 and 255.
>> >> > + */
>> >> > + for (cpsr = 2; cpsr <= 254; cpsr += 2) {
>> >> > + for (scr = 0; scr <= 255; scr++) {
>> >>
>> >> Non-deterministic.
> Eh? Some new meaning of "non-deterministic" that I wasn'f familiar with? :)
>
> Yes, it does look gross, but max clock rate is 3.7Mhz (7.4 in rev E2
> silicon), so if your slowest device is 400kHz, in practice it only
> runs the inner loop from 0 to less than 10.
> How slow do SPI devices go in reality? The 254*256 divisor gives 100Hz.
Fair enough. s/non-deterministic/gross/ :-p I just prefer to see
analytic solutions over numerical ones. :-) As I said, I won't
object to the driver because of these lines.
g.
--
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.
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