> + if (spi->mode & SPI_CPOL)
> + tmp = SSP_CLK_POL_IDLE_HIGH;
> + else
> + tmp = SSP_CLK_POL_IDLE_LOW;
> + SSP_WRITE_BITS(chip->cr0, tmp, SSP_CR0_MASK_SPO, 6);
> +
> + if (spi->mode & SPI_CPHA)
> + tmp = SSP_CLK_SECOND_EDGE;
> + else
> + tmp = SSP_CLK_FIRST_EDGE;
> + SSP_WRITE_BITS(chip->cr0, tmp, SSP_CR0_MASK_SPH, 6);
SSP_CR0_MASK_SPH (SPHA) should use bit 7, not bit 6.
Should be:
SSP_WRITE_BITS(chip->cr0, tmp, SSP_CR0_MASK_SPH, 7);
> +
> SSP_WRITE_BITS(chip->cr0, chip_info->clk_freq.scr, SSP_CR0_MASK_SCR,
> 8);
> /* Loopback is available on all versions except PL023 */
------------------------------------------------------------------------------
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