Hi Michael, On Sat, Sep 18, 2010 at 18:38:13, Michael Williamson wrote: > On 09/14/2010 09:26 AM, Nori, Sekhar wrote: > > Hi Mike, > > > > On Tue, Sep 14, 2010 at 18:40:56, Michael Williamson wrote: > >> On 9/14/2010 3:14 AM, Nori, Sekhar wrote: > >> > >>> On Tue, Sep 14, 2010 at 11:34:59, Caglar Akyuz wrote: > >>> > >>>> Yes, your patches seems ok and mostly complete. I'm waiting for hardware > >>>> to > >>>> test those, will let you know when I do some testing. > >>> > >>> Thanks! To save time, I haven't tested these patches myself. I have only > >>> made > >>> sure individual patches don't break the build. Was planning to test after > >>> the complete series is ready. > >>> > >> > >> > >> If it would help, If there are portions of the patch set that can be tested > >> with DMA disabled or something, I'd be willing to kick the tires. I have > >> da850 hardware available. > > > > Thanks for being brave and offering to help! Yes, interrupt and polled mode > > can be tried. Since a lot of testing has already happened on the original > > patch, > > I was planning to test the series only after it is complete. Any issues > > found can > > be narrowed down to the differences (which I hope will be justifiable). > > > > Thanks, > > Sekhar > > So I am testing with a configuration which is pretty much the same as the > da850 EVM; > a SPI-NOR flash on the first chip select of SPI1. Both poll and interrupt > modes > work. So far so good, and Brian's work really sorted out a bunch of questions > I had looking at the original spi code. Nice work, Nori, for break the patch > into logical blocks. I do have a couple of comments:
Really?? Just worked? Wooohooo... > > * I'm not sure I understand why there is a "intr_line" field in the platform > data and then a possibility to configure an "io_type" as interrupt or polled > at > the chip select level. I got burned by setting the "io_type" to > SPI_IO_TYPE_INTR > and not setting "intr_line" to non-zero. The probe just hung because it was > trying to use interrupts but never setting SPILVL register. These fields > aren't > mutually exclusive. Is the intent to support a configuration with one chip > select > running in polled mode and another in interrupt mode? If so, then it seems > the SPILVL > register logic needs some attention during each transfer. The intr_line to be set is constant for the SoC. So, irrespective of what the individual devices on a given board choose to operate (interrupted, polled or DMA) the SoC code (da850.c) should setup the intr_line according to how the SPI interrupt is wired within the SoC. Can you clarify what you mean by "needs some attention during each transfer"? > > * As a (novice) user, I'd really like to see some comments / hints added to > the > ../mach-davinci/include/mach/spi.h file to describe how all of the platform > fields > should be set. Some of the fields aren't very obvious as to how to initialize > them without having a data sheet on one screen and plowing through the > driver on another. This might have cleaned up my confusion on the first item. Good point. Will ensure this. Thanks, Sekhar ------------------------------------------------------------------------------ Start uncovering the many advantages of virtual appliances and start using them to simplify application deployment and accelerate your shift to cloud computing. http://p.sf.net/sfu/novell-sfdev2dev _______________________________________________ spi-devel-general mailing list [email protected] https://lists.sourceforge.net/lists/listinfo/spi-devel-general
