On Wed, Oct 6, 2010 at 7:49 AM, Sergii Kovalchuk
<[email protected]> wrote:
> Hi,
>
> I'm implementing an SPI protocol driver for TI WL12xx combo chip. According to
> the spec, for write transaction I should complete the following sequence:
>
> 1. Assert CS
> 2. Wait until chip will trigger IRQ
> 3. Write data
>
> Looking at spi_transfer structure I wondering, how I can implement such logic
> - there is no explicit ways to implement "wait for an event" within single
> spi_message processing.
>
> As current workarround I use a simple delay in 5 us, but for sleep states it
> might be not sufficient, since wake-up time are ususally greater.

Wow.  That's nasty.  The SPI layer really doesn't have a mechanism for
handling that.  What you *could* do is lock the spi bus; assert CS
manually; wait for the irq, and then issue the transfer.  Not exactly
pretty, but it would work within the existing infrastructure.

g.


-- 
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.

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