On 04/20/2011 08:34 AM, Niclas Karlsson wrote:
> tis 2011-04-19 klockan 14:40 -0600 skrev Kenneth Heitke:
>> On 04/18/2011 03:21 AM, Niclas Karlsson wrote:
>>> tor 2011-03-10 klockan 15:41 +0100 skrev David Lamparter:
>>>> On Tue, Mar 08, 2011 at 10:44:56AM +0100, Niclas Karlsson wrote:
>>>>> Do anyone know why I read so many zeroes?
>>>>
>>>> You're probably reading values faster than the chip supports. Check the
>>>> chip documentation for a maximum readout frequency or a ready flag.
>>>>> I have made some printk in ads7846.c to trace the problem. It seemed to
>>>>> read more correct values when I added the printks.
>>>>
>>>> A printk takes quite some time on an ARM like yours. The throttle makes
>>>> it work...
>>>
>>> I've made som further investigations. The atmel_spi.c driver utilize PDC
>>> (Peripheral DMA Controller) and when I was tracing the problem I
>>> discovered that the interrupt indicating the PDC has written the data to
>>> memory is fired before the data actually is written to memory. If a
>>> small delay is added after the interrupt (like a trace printk("The value
>>> is\n")) the PDC have enough time to write the data to the memory and I
>>> get correct values from the ADC connected to the SPI.
>>> Thoughts how to solve this?
>>
>> Is it really the interrupt firing early or is it possible that you are
>> still reading cached data. I'm not familiar with the device or driver
>> so I'm just throwing that out as a possibility.
> I have thought about it but I don't know how to test it. I disabled the
> whole d-cache in the kernel configuration, but everything ran so slow
> that I don't know if it was the disabled of d-cache or if the timing
> became so much different.
> If I want to bring the d-cache up to sync, how do I do that?
> Is it possible to allocate memory which never will be stored in d-cache?
> /Niclas
You might want to take a look at dma_alloc_coherent()
>>>>
>>>>
>>>> David
>>>>
>>>> P.S.: you're lucky to not get crap values - seems they got the chip
>>>> design right...
>>>>
>>> /Niclas
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>>
>>
>
>
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