On Wed, Jun 22, 2011 at 8:00 PM, <[email protected]> wrote: > From: Dirk Brandewie <[email protected]> > > Only four chip selects are available directly off the pins of the > master. > > Signed-off-by: Dirk Brandewie <[email protected]> > --- > drivers/spi/spi-dw-mid.c | 4 +++- > 1 files changed, 3 insertions(+), 1 deletions(-) > > diff --git a/drivers/spi/spi-dw-mid.c b/drivers/spi/spi-dw-mid.c > index 78e64d3..1d11268 100644 > --- a/drivers/spi/spi-dw-mid.c > +++ b/drivers/spi/spi-dw-mid.c > @@ -211,7 +211,9 @@ int spi_dw_mid_init(struct spi_dw *dws) > dws->max_freq = MRST_SPI_CLK_BASE / (clk_cdiv + 1); > iounmap(clk_reg); > > - dws->num_cs = 16; > + dws->num_cs = 4; /* spi_dw_chip_sel() bits 0-3 are > + * valid in the slave enable register > + */
I thought someone had told me that the dw spio core supported using the 4 cs lines in a multiplex mode to create up to 15 cs lines, but I may be misremembering. g. ------------------------------------------------------------------------------ Simplify data backup and recovery for your virtual environment with vRanger. Installation's a snap, and flexible recovery options mean your data is safe, secure and there when you need it. Data protection magic? Nope - It's vRanger. Get your free trial download today. http://p.sf.net/sfu/quest-sfdev2dev _______________________________________________ spi-devel-general mailing list [email protected] https://lists.sourceforge.net/lists/listinfo/spi-devel-general
