Hi Scott,
Some minor comments?
On Tue, Jun 5, 2012 at 12:51 AM, Scott Jiang
<[email protected]> wrote:
> New spi controller is integrated into Blackfin 6xx processor.
> Comparing to bf5xx spi controller, we support 32 bits word size
> and independent receive and transmit DMA channels now.
> Also mode 0 and 2 (CPHA = 0) can get fully supported
> becasue cs line may be controlled by the software.
<Snip>
how about using spi core queuing?
> +
> + status = bfin_spi_start_queue(drv_data);
> + if (status != 0) {
> + dev_err(dev, "problem starting queue\n");
> + goto err_destroy_queue;
> + }
> +
> + bfin_write(&drv_data->regs->control, SPI_CTL_MSTR | SPI_CTL_CPHA);
> + bfin_write(&drv_data->regs->ssel, 0x0000FE00);
> + bfin_write(&drv_data->regs->delay, 0x0);
> +
> + /* Register with the SPI framework */
> + platform_set_drvdata(pdev, drv_data);
> + status = spi_register_master(master);
> + if (status != 0) {
> + dev_err(dev, "problem registering spi master\n");
> + goto err_free_peripheral;
> + }
> +
> + dev_info(dev, "bfin-spi probe success\n");
> + return status;
> +
> +err_destroy_queue:
> + bfin_spi_destroy_queue(drv_data);
> +err_free_peripheral:
> + peripheral_free_list(drv_data->pin_req);
> +err_free_rx_dma:
> + free_dma(drv_data->rx_dma);
> +err_free_tx_dma:
> + free_dma(drv_data->tx_dma);
> +err_iounmap:
> + iounmap(drv_data->regs);
> +err_put_master:
> + spi_master_put(master);
> +
> + return status;
> +}
> +
> +/* stop hardware and remove the driver */
> +static int __devexit bfin_spi_remove(struct platform_device *pdev)
> +{
> + struct bfin_spi_master_data *drv_data = platform_get_drvdata(pdev);
> +
> + if (!drv_data)
> + return 0;
> +
> + /* Remove the queue */
> + bfin_spi_destroy_queue(drv_data);
> +
> + /* Disable the SSP at the peripheral and SOC level */
> + bfin_spi_disable(drv_data);
> +
> + peripheral_free_list(drv_data->pin_req);
> + free_dma(drv_data->rx_dma);
> + free_dma(drv_data->tx_dma);
> + iounmap(drv_data->regs);
> +
> + /* Disconnect from the SPI framework */
> + spi_unregister_master(drv_data->master);
> + spi_master_put(drv_data->master);
> + /* Prevent double remove */
> + platform_set_drvdata(pdev, NULL);
> +
> + return 0;
> +}
> +
> +#ifdef CONFIG_PM
> +static int bfin_spi_suspend(struct platform_device *pdev, pm_message_t state)
> +{
> + struct bfin_spi_master_data *drv_data = platform_get_drvdata(pdev);
> + int status = 0;
> +
> + status = bfin_spi_stop_queue(drv_data);
> + if (status != 0)
> + return status;
> +
> + drv_data->control = bfin_read(&drv_data->regs->control);
> + drv_data->ssel = bfin_read(&drv_data->regs->ssel);
> +
> + bfin_write(&drv_data->regs->control, SPI_CTL_MSTR | SPI_CTL_CPHA);
> + bfin_write(&drv_data->regs->ssel, 0x0000FE00);
> +
> + return 0;
> +}
> +
> +static int bfin_spi_resume(struct platform_device *pdev)
> +{
> + struct bfin_spi_master_data *drv_data = platform_get_drvdata(pdev);
> + int status = 0;
> +
> + bfin_write(&drv_data->regs->control, drv_data->control);
> + bfin_write(&drv_data->regs->ssel, drv_data->ssel);
> +
> + /* Start the queue running */
> + status = bfin_spi_start_queue(drv_data);
> + if (status != 0) {
> + dev_err(&pdev->dev, "problem starting queue (%d)\n", status);
> + return status;
> + }
> +
> + return 0;
> +}
> +#else
> +#define bfin_spi_suspend NULL
> +#define bfin_spi_resume NULL
> +#endif /* CONFIG_PM */
> +
> +MODULE_ALIAS("platform:bfin-spi");
> +static struct platform_driver bfin_spi_driver = {
> + .driver = {
> + .name = "bfin-spi",
> + .owner = THIS_MODULE,
> + },
> + .suspend = bfin_spi_suspend,
> + .resume = bfin_spi_resume,
Can we move to dev pm ops instead?
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