On 03/05/2013 09:05 PM, Mark Brown wrote:
> On Tue, Mar 05, 2013 at 07:49:02PM -0700, Stephen Warren wrote:
>> + switch (bpw) { + case 8: + break; +
>> default: +
>> dev_err(&spi->dev, "unsupported bits_per_word=%d\n", bpw); +
>> return -EINVAL; + }
Is there an assumption in the SPI core that bpw will never be >32? The
value is stored in a u8 in the controller and transfer structs, so
large values are physically possible. So if there is no such
assumption, then representing all of an SPI controller's supported BPW
in a mask/list would be a little unwieldy, so doing central checking
might not work well.
>> + if (!(spi->mode & SPI_NO_CS) && +
>> (spi->chip_select >
>> spi->master->num_chipselect)) { + dev_err(&spi->dev, +
>> "invalid chipselect %u\n", + spi->chip_select); +
>> return
>> -EINVAL; ` + }
>
> This seems like stuff the core should be able to do for you.
It looks like the core always validates the chip-select value, so I'll
remove that.
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