On Wed, Mar 06, 2013 at 01:02:41, Arnd Bergmann wrote: > On Tuesday 05 March 2013, Manjunathappa, Prakash wrote: > > On Mon, Mar 04, 2013 at 21:59:16, Arnd Bergmann wrote: > > > On Monday 04 March 2013 18:29:12 Manjunathappa, Prakash wrote: > > > > +- reg: Offset and length of SPI controller register space > > > > +- num-cs: Number of chip selects > > > > +- ti,davinci-spi-intr-line: interrupt line used to connect the SPI > > > > + IP to the interrupt controller withn the SoC. Possible values > > > > + are 0 and 1. Manual says one of the two possible interrupt > > > > + lines can be tied to the interrupt controller. Set this > > > > + based on a specifc SoC configuration. > > > > +- interrupts: interrupt number offset at the irq parent > > > > > > I would not call this an "offset". It is an interrupt descriptor > > > which may be something other than a simple number. > > > > > > > I am planning to drop from this documentation as it is common property. > > I think it makese sense to document the fact that there should be exactly > one interrupt listed in the interrupts property, especially since the > hardware has two outputs. >
Agreed, will consider this property for documenting. Thanks, Prakash ------------------------------------------------------------------------------ Symantec Endpoint Protection 12 positioned as A LEADER in The Forrester Wave(TM): Endpoint Security, Q1 2013 and "remains a good choice" in the endpoint security space. For insight on selecting the right partner to tackle endpoint security challenges, access the full report. http://p.sf.net/sfu/symantec-dev2dev _______________________________________________ spi-devel-general mailing list [email protected] https://lists.sourceforge.net/lists/listinfo/spi-devel-general
