On 06/12/2013 06:47 PM, Mark Brown wrote: > On Tue, Jun 11, 2013 at 08:09:15PM +0300, Illia Smyrnov wrote: >> The MCSPI controller has a built-in FIFO buffer to unload the DMA or >> interrupt >> handler and improve data throughput. This patch adds FIFO buffer support for >> SPI >> transfers in DMA mode. > >> The FIFO could be enabled for SPI module by setting up the >> "ti,spi-fifo-enabled" >> configuration parameter in DT. >> If FIFO enabled, the largest possible FIFO buffer size will be calculated and >> setup for each SPI transfer. Even if the FIFO is enabled in DT, it won't be >> used >> for the SPI transfers when: calculated FIFO buffer size is less then 2 bytes >> or >> the FIFO buffer size isn't multiple of the SPI word length. > > Why is the default to disable the FIFO? >
I have changed this and sent v3 patches of the MCSPI FIFO support implementation. In this version driver set up the FIFO (if possible) for all the SPI transfers in DMA mode. ------------------------------------------------------------------------------ This SF.net email is sponsored by Windows: Build for Windows Store. http://p.sf.net/sfu/windows-dev2dev _______________________________________________ spi-devel-general mailing list [email protected] https://lists.sourceforge.net/lists/listinfo/spi-devel-general
