This is a note to let you know that I've just added the patch titled
ASoC: wm8961 - clear WM8961_MCLKDIV bit for freq <= 16500000
to the 2.6.36-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
asoc-wm8961-clear-wm8961_mclkdiv-bit-for-freq-16500000.patch
and it can be found in the queue-2.6.36 subdirectory.
If you, or anyone else, feels it should not be added to the stable tree,
please let <[email protected]> know about it.
>From 2f7dceeda4708f470fd927adb3861bd8ebbe2310 Mon Sep 17 00:00:00 2001
From: Axel Lin <[email protected]>
Date: Wed, 24 Nov 2010 10:21:54 +0800
Subject: ASoC: wm8961 - clear WM8961_MCLKDIV bit for freq <= 16500000
From: Axel Lin <[email protected]>
commit 2f7dceeda4708f470fd927adb3861bd8ebbe2310 upstream.
MCLKDIV bit of Register 04h Clocking1:
0 : Divide by 1
1 : Divide by 2
Thus in the case of freq <= 16500000, we should clear MCLKDIV bit.
Signed-off-by: Axel Lin <[email protected]>
Acked-by: Liam Girdwood <[email protected]>
Signed-off-by: Mark Brown <[email protected]>
Signed-off-by: Greg Kroah-Hartman <[email protected]>
---
sound/soc/codecs/wm8961.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/sound/soc/codecs/wm8961.c
+++ b/sound/soc/codecs/wm8961.c
@@ -736,7 +736,7 @@ static int wm8961_set_sysclk(struct snd_
freq /= 2;
} else {
dev_dbg(codec->dev, "Using MCLK/1 for %dHz MCLK\n", freq);
- reg &= WM8961_MCLKDIV;
+ reg &= ~WM8961_MCLKDIV;
}
snd_soc_write(codec, WM8961_CLOCKING1, reg);
Patches currently in stable-queue which might be from [email protected] are
queue-2.6.36/asoc-wm8961-clear-wm8961_mclkdiv-bit-for-freq-16500000.patch
queue-2.6.36/asoc-wm8961-clear-wm8961_dacslope-bit-for-normal-mode.patch
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