This patch doesn't apply to the .36 stable tree If someone wants it applied there, please email the backport to [email protected]
thanks, greg k-h > commit: 16a02cf08a2de0863daf7ebb91718d7c6bbe7f9c > From: Zhenyu Wang <[email protected]> > Date: Tue, 2 Nov 2010 17:30:46 +0800 > Subject: [PATCH] agp/intel: fix cache control for sandybridge > > This is broken from 97ef1bdd0bc75bce7b2058e9c432b6c277dcf4d3. > Let's set the correct bit for LLC+MLC and LLC only. > > Signed-off-by: Zhenyu Wang <[email protected]> > Cc: [email protected] > Signed-off-by: Chris Wilson <[email protected]> > --- > drivers/char/agp/intel-gtt.c | 4 ++-- > 1 files changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/char/agp/intel-gtt.c b/drivers/char/agp/intel-gtt.c > index 791216d..9272c38 100644 > --- a/drivers/char/agp/intel-gtt.c > +++ b/drivers/char/agp/intel-gtt.c > @@ -1213,11 +1213,11 @@ static void gen6_write_entry(dma_addr_t addr, > unsigned int entry, > if (type_mask == AGP_USER_MEMORY) > pte_flags = GEN6_PTE_UNCACHED | I810_PTE_VALID; > else if (type_mask == AGP_USER_CACHED_MEMORY_LLC_MLC) { > - pte_flags = GEN6_PTE_LLC | I810_PTE_VALID; > + pte_flags = GEN6_PTE_LLC_MLC | I810_PTE_VALID; > if (gfdt) > pte_flags |= GEN6_PTE_GFDT; > } else { /* set 'normal'/'cached' to LLC by default */ > - pte_flags = GEN6_PTE_LLC_MLC | I810_PTE_VALID; > + pte_flags = GEN6_PTE_LLC | I810_PTE_VALID; > if (gfdt) > pte_flags |= GEN6_PTE_GFDT; > } > > _______________________________________________ > stable mailing list > [email protected] > http://linux.kernel.org/mailman/listinfo/stable _______________________________________________ stable mailing list [email protected] http://linux.kernel.org/mailman/listinfo/stable
