This patch breaks the build on the .36-stable tree, so I'm not going to
apply it, or the patch after it.

thanks,

greg k-h

> commit: 5bddd17fec58f253cddd0bc9eab2cd9eb1bbab4a
> From: Eric Anholt <[email protected]>
> Date: Thu, 18 Nov 2010 09:32:59 +0800
> Subject: [PATCH] drm/i915: Apply a workaround for transitioning from DP on 
> pipe B to HDMI.
> 
> This workaround only applies to Ironlake.
> 
> Signed-off-by: Eric Anholt <[email protected]>
> Signed-off-by: Chris Wilson <[email protected]>
> Cc: [email protected]
> ---
>  drivers/gpu/drm/i915/intel_dp.c |   21 +++++++++++++++++++++
>  1 files changed, 21 insertions(+), 0 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> index 300f64b..1d8d068 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -1374,6 +1374,7 @@ intel_dp_link_down(struct intel_dp *intel_dp)
>  {
>       struct drm_device *dev = intel_dp->base.base.dev;
>       struct drm_i915_private *dev_priv = dev->dev_private;
> +     struct intel_crtc *intel_crtc = to_intel_crtc(intel_dp->base.base.crtc);
>       uint32_t DP = intel_dp->DP;
>  
>       DRM_DEBUG_KMS("\n");
> @@ -1398,6 +1399,26 @@ intel_dp_link_down(struct intel_dp *intel_dp)
>  
>       if (is_edp(intel_dp))
>               DP |= DP_LINK_TRAIN_OFF;
> +
> +     if (!HAS_PCH_CPT(dev) && (DP & DP_PIPEB_SELECT)) {
> +             /* Hardware workaround: leaving our transcoder select
> +              * set to transcoder B while it's off will prevent the
> +              * corresponding HDMI output on transcoder A.
> +              *
> +              * Combine this with another hardware workaround:
> +              * transcoder select bit can only be cleared while the
> +              * port is enabled.
> +              */
> +             DP &= ~DP_PIPEB_SELECT;
> +             I915_WRITE(intel_dp->output_reg, DP);
> +
> +             /* Changes to enable or select take place the vblank
> +              * after being written.
> +              */
> +             intel_wait_for_vblank(intel_dp->base.base.dev,
> +                                   intel_crtc->pipe);
> +     }
> +
>       I915_WRITE(intel_dp->output_reg, DP & ~DP_PORT_EN);
>       POSTING_READ(intel_dp->output_reg);
>  }
> 
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