2.6.36-stable review patch. If anyone has any objections, please let us know.
------------------
From: Kenji Kaneshige <kaneshige.ke...@jp.fujitsu.com>
commit 086e8ced65d9bcc4a8e8f1cd39b09640f2883f90 upstream.
In x2apic mode, we need to set the upper address register of the fault
handling interrupt register of the vt-d hardware. Without this
irq migration of the vt-d fault handling interrupt is broken.
Signed-off-by: Kenji Kaneshige <kaneshige.ke...@jp.fujitsu.com>
LKML-Reference: <1291225233.2648.39.ca...@sbsiddha-mobl3>
Signed-off-by: Suresh Siddha <suresh.b.sid...@intel.com>
Acked-by: Chris Wright <chr...@sous-sol.org>
Tested-by: Takao Indoh <indou.ta...@jp.fujitsu.com>
Signed-off-by: H. Peter Anvin <h...@linux.intel.com>
Signed-off-by: Greg Kroah-Hartman <gre...@suse.de>
---
arch/x86/kernel/apic/io_apic.c | 1 +
1 file changed, 1 insertion(+)
--- a/arch/x86/kernel/apic/io_apic.c
+++ b/arch/x86/kernel/apic/io_apic.c
@@ -3626,6 +3626,7 @@ static int dmar_msi_set_affinity(unsigne
msg.data |= MSI_DATA_VECTOR(cfg->vector);
msg.address_lo &= ~MSI_ADDR_DEST_ID_MASK;
msg.address_lo |= MSI_ADDR_DEST_ID(dest);
+ msg.address_hi = MSI_ADDR_BASE_HI | MSI_ADDR_EXT_DEST_ID(dest);
dmar_msi_write(irq, &msg);
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