This is a note to let you know that I've just added the patch titled
ath9k_hw: read and backup AR_WA register value even before chip reset on.
to the 2.6.37-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
ath9k_hw-read-and-backup-ar_wa-register-value-even-before-chip-reset-on.patch
and it can be found in the queue-2.6.37 subdirectory.
If you, or anyone else, feels it should not be added to the stable tree,
please let <[email protected]> know about it.
>From 0a8d7cb0c8182df7a28ad719780071178c386f0f Mon Sep 17 00:00:00 2001
From: Senthil Balasubramanian <[email protected]>
Date: Wed, 22 Dec 2010 19:17:18 +0530
Subject: ath9k_hw: read and backup AR_WA register value even before chip reset
on.
From: Senthil Balasubramanian <[email protected]>
commit 0a8d7cb0c8182df7a28ad719780071178c386f0f upstream.
We need to read and backup AR_WA register value permanently and reading
this after the chip is awakened results in this register being zeroed out.
This seems to fix the ASPM with L1 enabled issue that we have observed.
The laptop becomes very slow and hangs mostly with ASPM L1 enabled without
this fix.
Signed-off-by: Senthil Balasubramanian <[email protected]>
Signed-off-by: John W. Linville <[email protected]>
Signed-off-by: Greg Kroah-Hartman <[email protected]>
---
drivers/net/wireless/ath/ath9k/hw.c | 17 +++++++++--------
1 file changed, 9 insertions(+), 8 deletions(-)
--- a/drivers/net/wireless/ath/ath9k/hw.c
+++ b/drivers/net/wireless/ath/ath9k/hw.c
@@ -516,6 +516,15 @@ static int __ath9k_hw_init(struct ath_hw
if (ah->hw_version.devid == AR5416_AR9100_DEVID)
ah->hw_version.macVersion = AR_SREV_VERSION_9100;
+ /*
+ * Read back AR_WA into a permanent copy and set bits 14 and 17.
+ * We need to do this to avoid RMW of this register. We cannot
+ * read the reg when chip is asleep.
+ */
+ ah->WARegVal = REG_READ(ah, AR_WA);
+ ah->WARegVal |= (AR_WA_D3_L1_DISABLE |
+ AR_WA_ASPM_TIMER_BASED_DISABLE);
+
if (!ath9k_hw_set_reset_reg(ah, ATH9K_RESET_POWER_ON)) {
ath_print(common, ATH_DBG_FATAL,
"Couldn't reset chip\n");
@@ -574,14 +583,6 @@ static int __ath9k_hw_init(struct ath_hw
ath9k_hw_init_mode_regs(ah);
- /*
- * Read back AR_WA into a permanent copy and set bits 14 and 17.
- * We need to do this to avoid RMW of this register. We cannot
- * read the reg when chip is asleep.
- */
- ah->WARegVal = REG_READ(ah, AR_WA);
- ah->WARegVal |= (AR_WA_D3_L1_DISABLE |
- AR_WA_ASPM_TIMER_BASED_DISABLE);
if (ah->is_pciexpress)
ath9k_hw_configpcipowersave(ah, 0, 0);
Patches currently in stable-queue which might be from [email protected]
are
queue-2.6.37/ath9k_hw-fix-incorrect-macversion-and-macrev-checks.patch
queue-2.6.37/ath9k_hw-read-and-backup-ar_wa-register-value-even-before-chip-reset-on.patch
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