commit: e89c0d7090c54d7b11b9b091e495a1ae345dd3ff From: Will Deacon <[email protected]> Date: Tue, 5 Apr 2011 13:57:53 +0100 Subject: [PATCH] ARM: 6864/1: hw_breakpoint: clear DBGVCR out of reset
The DBGVCR, used for configuring vector catch debug events, is UNKNOWN out of reset on ARMv7. When enabling monitor mode, this must be zeroed to avoid UNPREDICTABLE behaviour. This patch adds the zeroing code to the debug reset path. Cc: stable <[email protected]> Reported-by: Stepan Moskovchenko <[email protected]> Signed-off-by: Will Deacon <[email protected]> Signed-off-by: Russell King <[email protected]> --- arch/arm/kernel/hw_breakpoint.c | 7 +++++++ 1 files changed, 7 insertions(+), 0 deletions(-) diff --git a/arch/arm/kernel/hw_breakpoint.c b/arch/arm/kernel/hw_breakpoint.c index 8dbc126..87acc25 100644 --- a/arch/arm/kernel/hw_breakpoint.c +++ b/arch/arm/kernel/hw_breakpoint.c @@ -868,6 +868,13 @@ static void reset_ctrl_regs(void *info) */ asm volatile("mcr p14, 0, %0, c1, c0, 4" : : "r" (0)); isb(); + + /* + * Clear any configured vector-catch events before + * enabling monitor mode. + */ + asm volatile("mcr p14, 0, %0, c0, c7, 0" : : "r" (0)); + isb(); } if (enable_monitor_mode()) _______________________________________________ stable mailing list [email protected] http://linux.kernel.org/mailman/listinfo/stable
