This is a note to let you know that I've just added the patch titled
intel-iommu: Force-disable IOMMU for iGFX on broken Cantiga revisions.
to the 2.6.32-longterm tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/longterm/longterm-queue-2.6.32.git;a=summary
The filename of the patch is:
intel-iommu-force-disable-iommu-for-igfx-on-broken-c.patch
and it can be found in the queue-2.6.32 subdirectory.
If you, or anyone else, feels it should not be added to the 2.6.32 longterm
tree,
please let <[email protected]> know about it.
>From 78d187a53ef5ef687642d68506e7a03c069886a8 Mon Sep 17 00:00:00 2001
From: David Woodhouse <[email protected]>
Date: Tue, 15 Jun 2010 10:57:57 +0100
Subject: intel-iommu: Force-disable IOMMU for iGFX on broken Cantiga revisions.
From: David Woodhouse <[email protected]>
commit 2d9e667efdfb4e986074d98e7d9a424003c7c43b upstream.
Certain revisions of this chipset appear to be broken. There is a shadow
GTT which mirrors the real GTT but contains pre-translated physical
addresses, for performance reasons. When a GTT update happens, the
translations are done once and the resulting physical addresses written
back to the shadow GTT.
Except sometimes, the physical address is actually written back to the
_real_ GTT, not the shadow GTT. Thus we start to see faults when that
physical address is fed through translation again.
Signed-off-by: David Woodhouse <[email protected]>
Signed-off-by: Greg Kroah-Hartman <[email protected]>
---
drivers/pci/intel-iommu.c | 8 +++++++-
1 file changed, 7 insertions(+), 1 deletion(-)
--- a/drivers/pci/intel-iommu.c
+++ b/drivers/pci/intel-iommu.c
@@ -382,7 +382,7 @@ int dmar_disabled = 0;
int dmar_disabled = 1;
#endif /*CONFIG_DMAR_DEFAULT_ON*/
-static int __initdata dmar_map_gfx = 1;
+static int dmar_map_gfx = 1;
static int dmar_forcedac;
static int intel_iommu_strict;
@@ -3741,6 +3741,12 @@ static void __devinit quirk_iommu_rwbf(s
*/
printk(KERN_INFO "DMAR: Forcing write-buffer flush capability\n");
rwbf_quirk = 1;
+
+ /* https://bugzilla.redhat.com/show_bug.cgi?id=538163 */
+ if (dev->revision == 0x07) {
+ printk(KERN_INFO "DMAR: Disabling IOMMU for graphics on this
chipset\n");
+ dmar_map_gfx = 0;
+ }
}
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2a40, quirk_iommu_rwbf);
Patches currently in longterm-queue-2.6.32 which might be from
[email protected] are
/home/gregkh/linux/longterm/longterm-queue-2.6.32/queue-2.6.32/intel-iommu-force-disable-iommu-for-igfx-on-broken-c.patch
/home/gregkh/linux/longterm/longterm-queue-2.6.32/queue-2.6.32/intel-iommu-unlink-domain-from-iommu.patch
/home/gregkh/linux/longterm/longterm-queue-2.6.32/queue-2.6.32/intel-iommu-fix-get_domain_for_dev-error-path.patch
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