From: Kenneth Graunke <[email protected]>
commit d71de14ddf423ccc9a2e3f7e37553c99ead20d7c
Author: Kenneth Graunke <[email protected]>
Date: Wed Feb 8 12:53:52 2012 -0800
drm/i915: gen7: Disable the RHWO optimization as it can cause GPU
hangs.
The BSpec Workarounds page states that bits 10 and 26 must be set to
avoid 3D ring hangs.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=41353
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=44610
Tested-by: Eugeni Dodonov <[email protected]>
Signed-off-by: Kenneth Graunke <[email protected]>
Signed-off-by: Jesse Barnes <[email protected]>
Signed-off-by: Eugeni Dodonov <[email protected]>
---
drivers/gpu/drm/i915/i915_reg.h | 3 +++
drivers/gpu/drm/i915/intel_display.c | 4 ++++
2 files changed, 7 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 2ae87ca..1608d2a 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -2887,6 +2887,9 @@
#define DISP_FBC_WM_DIS (1<<15)
/* GEN7 chicken */
+#define GEN7_COMMON_SLICE_CHICKEN1 0x7010
+# define GEN7_CSC1_RHWO_OPT_DISABLE_IN_RCC ((1<<10) | (1<<26))
+
#define GEN7_L3CNTLREG1 0xB01C
#define GEN7_WA_FOR_GEN7_L3_CONTROL 0x3C4FFF8C
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index 5507c18..b850f2b 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -8255,6 +8255,10 @@ static void ivybridge_init_clock_gating(struct
drm_device *dev)
I915_WRITE(ILK_DSPCLK_GATE, IVB_VRHUNIT_CLK_GATE);
+ /* Apply the WaDisableRHWOOptimizationForRenderHang workaround. */
+ I915_WRITE(GEN7_COMMON_SLICE_CHICKEN1,
+ GEN7_CSC1_RHWO_OPT_DISABLE_IN_RCC);
+
/* WaApplyL3ControlAndL3ChickenMode requires those two on Ivy Bridge */
I915_WRITE(GEN7_L3CNTLREG1,
GEN7_WA_FOR_GEN7_L3_CONTROL);
--
1.7.9.2
--
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