I'm sorry, please don't apply this patch. 
It appears not only on P1022 platform.
There will be more breaks on other platforms regarding CTRL_PHY_CLK_VALID bit. 
I will post a new patch with well compatibility on all platforms as soon as I 
get necessary confirmations.

Thanks,
Shengzhou

> -----Original Message-----
> From: [email protected] [mailto:[email protected]]
> Sent: Wednesday, February 29, 2012 3:04 AM
> To: Liu Shengzhou-B36685; [email protected];
> [email protected]
> Subject: patch "powerpc/usb: fix usb CTRL_PHY_CLK_VALID breaks on some
> platform" added to usb tree
> 
> 
> This is a note to let you know that I've just added the patch titled
> 
>     powerpc/usb: fix usb CTRL_PHY_CLK_VALID breaks on some platform
> 
> to my usb git tree which can be found at
>     git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb.git
> in the usb-next branch.
> 
> The patch will show up in the next release of the linux-next tree
> (usually sometime within the next 24 hours during the week.)
> 
> The patch will also will be merged in the next major kernel release
> during the merge window.
> 
> If you have any questions about this process, please let me know.
> 
> 
> From 79857e8e7b1ba740f8025b540f1e171c9a0a5d31 Mon Sep 17 00:00:00 2001
> From: Shengzhou Liu <[email protected]>
> Date: Sat, 25 Feb 2012 23:56:30 +0800
> Subject: powerpc/usb: fix usb CTRL_PHY_CLK_VALID breaks on some
> platform
> 
> Fix checking of CTRL_PHY_CLK_VALID bit break on some platform on which
> there is not USB CTRL_PHY_CLK_VALID bit.
>   - P1023/P3041/P5020 etc,have this bit
>   - P3060/4080/PSC913x do have this bit, but not mentioned in RM.
>   - P1022(perhaps and other) has no this bit
> 
> Signed-off-by: Shengzhou Liu <[email protected]>
> Cc: stable <[email protected]>
> Signed-off-by: Greg Kroah-Hartman <[email protected]>
> ---
>  drivers/usb/host/ehci-fsl.c |   24 ++++++++++++++----------
>  1 files changed, 14 insertions(+), 10 deletions(-)
> 
> diff --git a/drivers/usb/host/ehci-fsl.c b/drivers/usb/host/ehci-fsl.c
> index 7a15c22..e9d8a0c 100644
> --- a/drivers/usb/host/ehci-fsl.c
> +++ b/drivers/usb/host/ehci-fsl.c
> @@ -248,7 +248,11 @@ static int ehci_fsl_usb_setup(struct ehci_hcd
> *ehci)
>       struct usb_hcd *hcd = ehci_to_hcd(ehci);
>       struct fsl_usb2_platform_data *pdata;
>       void __iomem *non_ehci = hcd->regs;
> -     u32 temp;
> +     u32 temp, chip, rev, svr;
> +
> +     svr = mfspr(SPRN_SVR);
> +     chip = svr >> 16;
> +     rev = (svr >> 4) & 0xf;
> 
>       pdata = hcd->self.controller->platform_data;
> 
> @@ -274,12 +278,6 @@ static int ehci_fsl_usb_setup(struct ehci_hcd
> *ehci)
>               ehci_fsl_setup_phy(ehci, pdata->phy_mode, 0);
> 
>       if (pdata->operating_mode == FSL_USB2_MPH_HOST) {
> -             unsigned int chip, rev, svr;
> -
> -             svr = mfspr(SPRN_SVR);
> -             chip = svr >> 16;
> -             rev = (svr >> 4) & 0xf;
> -
>               /* Deal with USB Erratum #14 on MPC834x Rev 1.0 & 1.1 chips
> */
>               if ((rev == 1) && (chip >= 0x8050) && (chip <= 0x8055))
>                       ehci->has_fsl_port_bug = 1;
> @@ -301,9 +299,15 @@ static int ehci_fsl_usb_setup(struct ehci_hcd
> *ehci)
>               out_be32(non_ehci + FSL_SOC_USB_SICTRL, 0x00000001);
>       }
> 
> -     if (!(in_be32(non_ehci + FSL_SOC_USB_CTRL) & CTRL_PHY_CLK_VALID))
> {
> -             printk(KERN_WARNING "fsl-ehci: USB PHY clock invalid\n");
> -             return -ENODEV;
> +     /* There is no CTRL_PHY_CLK_VALID bit on some platforms, e.g.
> P1022 */
> +#define SVR_P1022_N_ID 0x80E6 #define SVR_P1022_S_ID 0x80EE
> +     if (chip != SVR_P1022_N_ID && chip != SVR_P1022_S_ID) {
> +             if (!(in_be32(non_ehci + FSL_SOC_USB_CTRL) &
> +                                     CTRL_PHY_CLK_VALID)) {
> +                     printk(KERN_WARNING "fsl-ehci: USB PHY clock
> invalid\n");
> +                     return -ENODEV;
> +             }
>       }
>       return 0;
>  }
> --
> 1.7.9
> 
> 


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