This is a note to let you know that I've just added the patch titled
drm/i915: gen7: implement rczunit workaround
to the 3.2-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
drm-i915-gen7-implement-rczunit-workaround.patch
and it can be found in the queue-3.2 subdirectory.
If you, or anyone else, feels it should not be added to the stable tree,
please let <[email protected]> know about it.
>From eae66b50c760233fad526edf4a0d327be17a055d Mon Sep 17 00:00:00 2001
From: Eugeni Dodonov <[email protected]>
Date: Wed, 8 Feb 2012 12:53:49 -0800
Subject: drm/i915: gen7: implement rczunit workaround
From: Eugeni Dodonov <[email protected]>
commit eae66b50c760233fad526edf4a0d327be17a055d upstream.
This is yet another workaround related to clock gating which we need on
Ivy Bridge.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=41353
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=44610
Tested-by: Eugeni Dodonov <[email protected]>
Signed-off-by: Eugeni Dodonov <[email protected]>
Signed-off-by: Kenneth Graunke <[email protected]>
Signed-off-by: Jesse Barnes <[email protected]>
Signed-off-by: Greg Kroah-Hartman <[email protected]>
---
drivers/gpu/drm/i915/i915_reg.h | 1 +
drivers/gpu/drm/i915/intel_display.c | 5 +++++
2 files changed, 6 insertions(+)
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -3476,6 +3476,7 @@
#define GT_FIFO_NUM_RESERVED_ENTRIES 20
#define GEN6_UCGCTL2 0x9404
+# define GEN6_RCZUNIT_CLOCK_GATE_DISABLE (1 << 13)
# define GEN6_RCPBUNIT_CLOCK_GATE_DISABLE (1 << 12)
# define GEN6_RCCUNIT_CLOCK_GATE_DISABLE (1 << 11)
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -8248,6 +8248,11 @@ static void ivybridge_init_clock_gating(
I915_WRITE(WM2_LP_ILK, 0);
I915_WRITE(WM1_LP_ILK, 0);
+ /* According to the spec, bit 13 (RCZUNIT) must be set on IVB.
+ * This implements the WaDisableRCZUnitClockGating workaround.
+ */
+ I915_WRITE(GEN6_UCGCTL2, GEN6_RCZUNIT_CLOCK_GATE_DISABLE);
+
I915_WRITE(ILK_DSPCLK_GATE, IVB_VRHUNIT_CLK_GATE);
for_each_pipe(pipe) {
Patches currently in stable-queue which might be from [email protected]
are
queue-3.2/drm-i915-gen7-implement-rczunit-workaround.patch
queue-3.2/drm-i915-gen7-implement-an-l3-caching-workaround.patch
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