2015-02-25 2:43 GMT+08:00 Andy Shevchenko <[email protected]>: > The commit d297933cc7fc (spi: dw: Fix detecting FIFO depth) tries to fix the > logic of the FIFO detection based on the description on the comments. However, > there is a slight difference between numbers in TX Level and TX FIFO size. > > So, by specification the FIFO size would be in a range 2-256 bytes. From TX > Level prospective it means we can set threshold in the range 0-(FIFO size - 1) > bytes. Hence there are currently two issues: > a) FIFO size 2 bytes is actually skipped since TX Level is 1 bit and could > be > either 0 or 1 byte; > b) FIFO size is incorrectly decreased by 1 which already done by meaning of > TX Level register. > > This patch fixes it eventually right. > > Fixes: d297933cc7fc (spi: dw: Fix detecting FIFO depth) > Cc: Axel Lin <[email protected]> > Cc: [email protected] > Signed-off-by: Andy Shevchenko <[email protected]>
Reviewed-by: Axel Lin <[email protected]> -- To unsubscribe from this list: send the line "unsubscribe stable" in the body of a message to [email protected] More majordomo info at http://vger.kernel.org/majordomo-info.html
