This is a note to let you know that I've just added the patch titled
ACPI / LPSS: Deassert resets for SPI host controllers on Braswell
to the 3.18-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
acpi-lpss-deassert-resets-for-spi-host-controllers-on-braswell.patch
and it can be found in the queue-3.18 subdirectory.
If you, or anyone else, feels it should not be added to the stable tree,
please let <[email protected]> know about it.
>From 3095794ae972bc6fc76af6cb3b864d6686b96094 Mon Sep 17 00:00:00 2001
From: Mika Westerberg <[email protected]>
Date: Wed, 18 Feb 2015 13:50:17 +0200
Subject: ACPI / LPSS: Deassert resets for SPI host controllers on Braswell
From: Mika Westerberg <[email protected]>
commit 3095794ae972bc6fc76af6cb3b864d6686b96094 upstream.
On some Braswell systems BIOS leaves resets for SPI host controllers
active. This prevents the SPI driver from transferring messages on wire.
Fix this in similar way that we do for I2C already by deasserting resets
for the SPI host controllers.
Reported-by: Yang A Fang <[email protected]>
Signed-off-by: Mika Westerberg <[email protected]>
Signed-off-by: Rafael J. Wysocki <[email protected]>
Signed-off-by: Greg Kroah-Hartman <[email protected]>
---
drivers/acpi/acpi_lpss.c | 19 +++++++++++++++----
1 file changed, 15 insertions(+), 4 deletions(-)
--- a/drivers/acpi/acpi_lpss.c
+++ b/drivers/acpi/acpi_lpss.c
@@ -105,9 +105,7 @@ static void lpss_uart_setup(struct lpss_
}
}
-#define LPSS_I2C_ENABLE 0x6c
-
-static void byt_i2c_setup(struct lpss_private_data *pdata)
+static void lpss_deassert_reset(struct lpss_private_data *pdata)
{
unsigned int offset;
u32 val;
@@ -116,6 +114,13 @@ static void byt_i2c_setup(struct lpss_pr
val = readl(pdata->mmio_base + offset);
val |= LPSS_RESETS_RESET_APB | LPSS_RESETS_RESET_FUNC;
writel(val, pdata->mmio_base + offset);
+}
+
+#define LPSS_I2C_ENABLE 0x6c
+
+static void byt_i2c_setup(struct lpss_private_data *pdata)
+{
+ lpss_deassert_reset(pdata);
if (readl(pdata->mmio_base + pdata->dev_desc->prv_offset))
pdata->fixed_clk_rate = 133000000;
@@ -170,6 +175,12 @@ static struct lpss_device_desc byt_i2c_d
.setup = byt_i2c_setup,
};
+static struct lpss_device_desc bsw_spi_dev_desc = {
+ .flags = LPSS_CLK | LPSS_CLK_GATE | LPSS_CLK_DIVIDER | LPSS_SAVE_CTX,
+ .prv_offset = 0x400,
+ .setup = lpss_deassert_reset,
+};
+
#else
#define LPSS_ADDR(desc) (0UL)
@@ -202,7 +213,7 @@ static const struct acpi_device_id acpi_
/* Braswell LPSS devices */
{ "80862288", LPSS_ADDR(byt_pwm_dev_desc) },
{ "8086228A", LPSS_ADDR(byt_uart_dev_desc) },
- { "8086228E", LPSS_ADDR(byt_spi_dev_desc) },
+ { "8086228E", LPSS_ADDR(bsw_spi_dev_desc) },
{ "808622C1", LPSS_ADDR(byt_i2c_dev_desc) },
{ "INT3430", LPSS_ADDR(lpt_dev_desc) },
Patches currently in stable-queue which might be from
[email protected] are
queue-3.18/acpi-lpss-deassert-resets-for-spi-host-controllers-on-braswell.patch
queue-3.18/acpi-lpss-always-disable-i2c-host-controllers.patch
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