Since the hardware sometimes mysteriously totally flummoxes the 64bit read of a 64bit register when read using a single instruction, split the read into two instructions. Since the read here is of automatically incrementing timestamp counters, we also have to be very careful in order to make sure that it does not increment between the two instructions.
The phenomen was first observed on a 32bit system which offset the value by 32bits, but recently even 64bit Haswell systems have been demonstrated to return complete garbage instead. Reported-by: Karol Herbst <[email protected]> Tested-by: Karol Herbst <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91317 Signed-off-by: Chris Wilson <[email protected]> Cc: [email protected] --- drivers/gpu/drm/i915/intel_uncore.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c index 2c477663d378..66fdc85697f6 100644 --- a/drivers/gpu/drm/i915/intel_uncore.c +++ b/drivers/gpu/drm/i915/intel_uncore.c @@ -1325,7 +1325,7 @@ int i915_reg_read_ioctl(struct drm_device *dev, switch (entry->size) { case 8: - reg->val = I915_READ64(reg->offset); + reg->val = I915_READ64_2x32(reg->offset, reg->offset+4); break; case 4: reg->val = I915_READ(reg->offset); -- 2.1.4 -- To unsubscribe from this list: send the line "unsubscribe stable" in the body of a message to [email protected] More majordomo info at http://vger.kernel.org/majordomo-info.html
