Hi Russell, On mar., sept. 29 2015, Russell King - ARM Linux <[email protected]> wrote:
> On Tue, Sep 29, 2015 at 06:50:57PM +0200, Gregory CLEMENT wrote: >> When a L2 cache controller is used in a system that provides hardware > > You're talking about L2 cache here, but you're also masking out the L1 > cache maintanence (dmac_*) too. It's my understanding that we don't > yet support coherency to L1 yet. Do you suggest to not masking the dmac_* operation ? Initially I tought that L1 and L2 cache maintanence operation were more or less linked but I might mix up. Thanks, Gregory -- Gregory Clement, Free Electrons Kernel, drivers, real-time and embedded Linux development, consulting, training and support. http://free-electrons.com -- To unsubscribe from this list: send the line "unsubscribe stable" in the body of a message to [email protected] More majordomo info at http://vger.kernel.org/majordomo-info.html
